forked from OSchip/llvm-project
Split TailDuplicatePass into pre- and post-RA variant; NFC
Split TailDuplicatePass into EarlyTailDuplicate and TailDuplicate. This avoids playing games with fake pass IDs and using MRI::isSSA() to determine pre-/post-RA state. llvm-svn: 322926
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@ -212,6 +212,10 @@ namespace llvm {
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/// into tails of their predecessors.
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extern char &TailDuplicateID;
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/// Duplicate blocks with unconditional branches into tails of their
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/// predecessors. Variant that works before register allocation.
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extern char &EarlyTailDuplicateID;
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/// MachineTraceMetrics - This pass computes critical path and CPU resource
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/// usage in an ensemble of traces.
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extern char &MachineTraceMetricsID;
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@ -90,10 +90,6 @@ public:
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/// TargetPassConfig APIs to identify multiple occurrences of the same pass.
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///
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/// EarlyTailDuplicate - A clone of the TailDuplicate pass that runs early
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/// during codegen, on SSA form.
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static char EarlyTailDuplicateID;
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/// PostRAMachineLICM - A clone of the LICM pass that runs during late machine
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/// optimization after regalloc.
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static char PostRAMachineLICMID;
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@ -99,6 +99,7 @@ void initializeConstantMergeLegacyPassPass(PassRegistry&);
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void initializeConstantPropagationPass(PassRegistry&);
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void initializeCorrelatedValuePropagationPass(PassRegistry&);
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void initializeCostModelAnalysisPass(PassRegistry&);
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void initializeEarlyTailDuplicatePass(PassRegistry&);
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void initializeEntryExitInstrumenterPass(PassRegistry&);
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void initializePostInlineEntryExitInstrumenterPass(PassRegistry&);
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void initializeCrossDSOCFIPass(PassRegistry&);
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@ -362,7 +363,7 @@ void initializeStripSymbolsPass(PassRegistry&);
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void initializeStructurizeCFGPass(PassRegistry&);
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void initializeHWAddressSanitizerPass(PassRegistry&);
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void initializeTailCallElimPass(PassRegistry&);
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void initializeTailDuplicatePassPass(PassRegistry&);
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void initializeTailDuplicatePass(PassRegistry&);
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void initializeTargetLibraryInfoWrapperPassPass(PassRegistry&);
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void initializeTargetPassConfigPass(PassRegistry&);
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void initializeTargetTransformInfoWrapperPassPass(PassRegistry&);
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@ -28,6 +28,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeDetectDeadLanesPass(Registry);
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initializeDwarfEHPreparePass(Registry);
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initializeEarlyIfConverterPass(Registry);
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initializeEarlyTailDuplicatePass(Registry);
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initializeExpandISelPseudosPass(Registry);
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initializeExpandMemCmpPassPass(Registry);
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initializeExpandPostRAPass(Registry);
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@ -89,7 +90,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeStackMapLivenessPass(Registry);
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initializeStackProtectorPass(Registry);
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initializeStackSlotColoringPass(Registry);
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initializeTailDuplicatePassPass(Registry);
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initializeTailDuplicatePass(Registry);
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initializeTargetPassConfigPass(Registry);
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initializeTwoAddressInstructionPassPass(Registry);
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initializeUnpackMachineBundlesPass(Registry);
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@ -7,8 +7,9 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass duplicates basic blocks ending in unconditional branches into
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// the tails of their predecessors, using the TailDuplicator utility class.
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/// \file This pass duplicates basic blocks ending in unconditional branches
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/// into the tails of their predecessors, using the TailDuplicator utility
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/// class.
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//
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//===----------------------------------------------------------------------===//
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@ -26,38 +27,55 @@ using namespace llvm;
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namespace {
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/// Perform tail duplication. Delegates to TailDuplicator
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class TailDuplicatePass : public MachineFunctionPass {
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class TailDuplicateBase : public MachineFunctionPass {
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TailDuplicator Duplicator;
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bool PreRegAlloc;
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public:
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static char ID;
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explicit TailDuplicatePass() : MachineFunctionPass(ID) {}
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TailDuplicateBase(char &PassID, bool PreRegAlloc)
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: MachineFunctionPass(PassID), PreRegAlloc(PreRegAlloc) {}
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<MachineBranchProbabilityInfo>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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class TailDuplicate : public TailDuplicateBase {
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public:
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static char ID;
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TailDuplicate() : TailDuplicateBase(ID, false) {
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initializeTailDuplicatePass(*PassRegistry::getPassRegistry());
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}
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};
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class EarlyTailDuplicate : public TailDuplicateBase {
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public:
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static char ID;
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EarlyTailDuplicate() : TailDuplicateBase(ID, true) {
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initializeEarlyTailDuplicatePass(*PassRegistry::getPassRegistry());
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}
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};
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} // end anonymous namespace
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char TailDuplicatePass::ID = 0;
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char TailDuplicate::ID;
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char EarlyTailDuplicate::ID;
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char &llvm::TailDuplicateID = TailDuplicatePass::ID;
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char &llvm::TailDuplicateID = TailDuplicate::ID;
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char &llvm::EarlyTailDuplicateID = EarlyTailDuplicate::ID;
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INITIALIZE_PASS(TailDuplicatePass, DEBUG_TYPE, "Tail Duplication", false, false)
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INITIALIZE_PASS(TailDuplicate, DEBUG_TYPE, "Tail Duplication", false, false)
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INITIALIZE_PASS(EarlyTailDuplicate, "early-tailduplication",
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"Early Tail Duplication", false, false)
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bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
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bool TailDuplicateBase::runOnMachineFunction(MachineFunction &MF) {
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if (skipFunction(MF.getFunction()))
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return false;
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auto MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
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// TODO: Querying isSSA() to determine pre-/post-regalloc is fragile, better
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// split this into two passes instead.
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bool PreRegAlloc = MF.getRegInfo().isSSA();
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Duplicator.initMF(MF, PreRegAlloc, MBPI, /* LayoutMode */ false);
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Duplicator.initMF(MF, PreRegAlloc, MBPI, /*LayoutMode=*/false);
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bool MadeChange = false;
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while (Duplicator.tailDuplicateBlocks())
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@ -65,8 +83,3 @@ bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
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return MadeChange;
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}
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void TailDuplicatePass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineBranchProbabilityInfo>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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@ -226,7 +226,7 @@ static IdentifyingPassPtr overridePass(AnalysisID StandardID,
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if (StandardID == &TailDuplicateID)
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return applyDisable(TargetID, DisableTailDuplicate);
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if (StandardID == &TargetPassConfig::EarlyTailDuplicateID)
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if (StandardID == &EarlyTailDuplicateID)
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return applyDisable(TargetID, DisableEarlyTailDup);
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if (StandardID == &MachineBlockPlacementID)
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@ -268,7 +268,6 @@ INITIALIZE_PASS(TargetPassConfig, "targetpassconfig",
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char TargetPassConfig::ID = 0;
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// Pseudo Pass IDs.
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char TargetPassConfig::EarlyTailDuplicateID = 0;
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char TargetPassConfig::PostRAMachineLICMID = 0;
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namespace {
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@ -367,7 +366,6 @@ TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm)
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initializeAAResultsWrapperPassPass(*PassRegistry::getPassRegistry());
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// Substitute Pseudo Pass IDs for real ones.
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substitutePass(&EarlyTailDuplicateID, &TailDuplicateID);
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substitutePass(&PostRAMachineLICMID, &MachineLICMID);
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if (StringRef(PrintMachineInstrs.getValue()).equals(""))
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@ -1,4 +1,4 @@
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; RUN: llc -stop-after=tailduplication < %s | FileCheck %s
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; RUN: llc -stop-after=early-tailduplication < %s | FileCheck %s
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;
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; Check that DebugLoc attached to the branch instruction of
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; 'while.cond1.preheader.lr.ph' survives after tailduplication pass.
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