From 3aacca4622e217650fdafb04abd2b23de54a7a10 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Thu, 25 Jul 2013 07:26:29 +0000 Subject: [PATCH] RegPressure: Order the "pressure sets" by number of regunits per set. This lets heuristics easily pick the most important set to follow. llvm-svn: 187108 --- llvm/utils/TableGen/CodeGenRegisters.cpp | 27 ++++++++++++++++++++- llvm/utils/TableGen/CodeGenRegisters.h | 16 +++++++++++- llvm/utils/TableGen/RegisterInfoEmitter.cpp | 18 +++++++++----- 3 files changed, 53 insertions(+), 8 deletions(-) diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp index d9f230ef1c7b..fcc9f3d3509b 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -956,7 +956,7 @@ CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) { std::sort(TupRegsCopy.begin(), TupRegsCopy.end(), LessRecordRegister()); for (unsigned j = 0, je = TupRegsCopy.size(); j != je; ++j) getReg((TupRegsCopy)[j]); - TupRegsCopy.clear(); + TupRegsCopy.clear(); } // Now all the registers are known. Build the object graph of explicit @@ -1620,6 +1620,16 @@ void CodeGenRegBank::computeRegUnitSets() { } } +struct LessUnits { + const CodeGenRegBank &RegBank; + LessUnits(const CodeGenRegBank &RB): RegBank(RB) {} + + bool operator()(unsigned ID1, unsigned ID2) { + return RegBank.getRegPressureSet(ID1).Units.size() + < RegBank.getRegPressureSet(ID2).Units.size(); + } +}; + void CodeGenRegBank::computeDerivedInfo() { computeComposites(); computeSubRegIndexLaneMasks(); @@ -1631,6 +1641,21 @@ void CodeGenRegBank::computeDerivedInfo() { // Compute a unique set of RegUnitSets. One for each RegClass and inferred // supersets for the union of overlapping sets. computeRegUnitSets(); + + // Get the weight of each set. + for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) + RegUnitSets[Idx].Weight = getRegUnitSetWeight(RegUnitSets[Idx].Units); + + // Find the order of each set. + RegUnitSetOrder.reserve(RegUnitSets.size()); + for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) + RegUnitSetOrder.push_back(Idx); + + std::stable_sort(RegUnitSetOrder.begin(), RegUnitSetOrder.end(), + LessUnits(*this)); + for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { + RegUnitSets[RegUnitSetOrder[Idx]].Order = Idx; + } } // diff --git a/llvm/utils/TableGen/CodeGenRegisters.h b/llvm/utils/TableGen/CodeGenRegisters.h index 33f32b081234..37f75b4a4868 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.h +++ b/llvm/utils/TableGen/CodeGenRegisters.h @@ -433,6 +433,10 @@ namespace llvm { std::string Name; std::vector Units; + unsigned Weight; // Cache the sum of all unit weights. + unsigned Order; // Cache the sort key. + + RegUnitSet() : Weight(0), Order(0) {} }; // Base vector for identifying TopoSigs. The contents uniquely identify a @@ -484,6 +488,9 @@ namespace llvm { // already exist for a register class, we create a new entry in this vector. std::vector > RegClassUnitSets; + // Give each register unit set an order based on sorting criteria. + std::vector RegUnitSetOrder; + // Add RC to *2RC maps. void addToMaps(CodeGenRegisterClass*); @@ -622,6 +629,13 @@ namespace llvm { return Weight; } + unsigned getRegSetIDAt(unsigned Order) const { + return RegUnitSetOrder[Order]; + } + const RegUnitSet &getRegSetAt(unsigned Order) const { + return RegUnitSets[RegUnitSetOrder[Order]]; + } + // Increase a RegUnitWeight. void increaseRegUnitWeight(unsigned RUID, unsigned Inc) { getRegUnit(RUID).Weight += Inc; @@ -631,7 +645,7 @@ namespace llvm { unsigned getNumRegPressureSets() const { return RegUnitSets.size(); } // Get a set of register unit IDs for a given dimension of pressure. - RegUnitSet getRegPressureSet(unsigned Idx) const { + const RegUnitSet &getRegPressureSet(unsigned Idx) const { return RegUnitSets[Idx]; } diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 942163e77dc1..4d423e484f4c 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -223,7 +223,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, << "getRegPressureSetName(unsigned Idx) const {\n" << " static const char *PressureNameTable[] = {\n"; for (unsigned i = 0; i < NumSets; ++i ) { - OS << " \"" << RegBank.getRegPressureSet(i).Name << "\",\n"; + OS << " \"" << RegBank.getRegSetAt(i).Name << "\",\n"; } OS << " 0 };\n" << " return PressureNameTable[Idx];\n" @@ -235,9 +235,9 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, << "getRegPressureSetLimit(unsigned Idx) const {\n" << " static const unsigned PressureLimitTable[] = {\n"; for (unsigned i = 0; i < NumSets; ++i ) { - const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i); - OS << " " << RegBank.getRegUnitSetWeight(RegUnits.Units) - << ", \t// " << i << ": " << RegUnits.Name << "\n"; + const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); + OS << " " << RegUnits.Weight << ", \t// " << i << ": " + << RegUnits.Name << "\n"; } OS << " 0 };\n" << " return PressureLimitTable[Idx];\n" @@ -252,9 +252,15 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, for (unsigned i = 0, StartIdx = 0, e = NumRCUnitSets; i != e; ++i) { RCSetStarts[i] = StartIdx; ArrayRef PSetIDs = RegBank.getRCPressureSetIDs(i); + std::vector PSets; + PSets.reserve(PSetIDs.size()); for (ArrayRef::iterator PSetI = PSetIDs.begin(), PSetE = PSetIDs.end(); PSetI != PSetE; ++PSetI) { - OS << *PSetI << ", "; + PSets.push_back(RegBank.getRegPressureSet(*PSetI).Order); + } + std::sort(PSets.begin(), PSets.end()); + for (unsigned i = 0, e = PSets.size(); i < e; ++i) { + OS << PSets[i] << ", "; ++StartIdx; } OS << "-1, \t// #" << RCSetStarts[i] << " "; @@ -264,7 +270,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, OS << "inferred"; for (ArrayRef::iterator PSetI = PSetIDs.begin(), PSetE = PSetIDs.end(); PSetI != PSetE; ++PSetI) { - OS << "~" << RegBank.getRegPressureSet(*PSetI).Name; + OS << "~" << RegBank.getRegSetAt(*PSetI).Name; } } OS << "\n ";