forked from OSchip/llvm-project
AMDGPU/GlobalISel: Fix RegBankSelect for 1024-bit values
llvm-svn: 373412
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parent
075bc48a7f
commit
3a657afb3a
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@ -22,15 +22,17 @@ enum PartialMappingIdx {
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PM_SGPR128 = 9,
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PM_SGPR256 = 10,
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PM_SGPR512 = 11,
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PM_VGPR1 = 12,
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PM_VGPR16 = 16,
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PM_VGPR32 = 17,
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PM_VGPR64 = 18,
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PM_VGPR128 = 19,
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PM_VGPR256 = 20,
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PM_VGPR512 = 21,
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PM_SGPR96 = 22,
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PM_VGPR96 = 23
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PM_SGPR1024 = 12,
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PM_VGPR1 = 13,
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PM_VGPR16 = 17,
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PM_VGPR32 = 18,
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PM_VGPR64 = 19,
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PM_VGPR128 = 20,
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PM_VGPR256 = 21,
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PM_VGPR512 = 22,
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PM_VGPR1024 = 23,
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PM_SGPR96 = 24,
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PM_VGPR96 = 25
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};
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const RegisterBankInfo::PartialMapping PartMappings[] {
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@ -45,6 +47,7 @@ const RegisterBankInfo::PartialMapping PartMappings[] {
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{0, 128, SGPRRegBank},
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{0, 256, SGPRRegBank},
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{0, 512, SGPRRegBank},
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{0, 1024, SGPRRegBank},
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{0, 1, VGPRRegBank}, // VGPR begin
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{0, 16, VGPRRegBank},
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@ -53,8 +56,9 @@ const RegisterBankInfo::PartialMapping PartMappings[] {
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{0, 128, VGPRRegBank},
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{0, 256, VGPRRegBank},
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{0, 512, VGPRRegBank},
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{0, 1024, VGPRRegBank},
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{0, 96, SGPRRegBank},
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{0, 96, VGPRRegBank},
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{0, 96, VGPRRegBank}
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};
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const RegisterBankInfo::ValueMapping ValMappings[] {
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@ -65,30 +69,32 @@ const RegisterBankInfo::ValueMapping ValMappings[] {
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{&PartMappings[1], 1},
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// SGPRs
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{&PartMappings[2], 1},
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{&PartMappings[2], 1}, // 1
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{nullptr, 0}, // Illegal power of 2 sizes
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{nullptr, 0},
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{nullptr, 0},
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{&PartMappings[3], 1},
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{&PartMappings[4], 1},
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{&PartMappings[5], 1},
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{&PartMappings[6], 1},
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{&PartMappings[7], 1},
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{&PartMappings[8], 1},
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{&PartMappings[3], 1}, // 16
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{&PartMappings[4], 1}, // 32
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{&PartMappings[5], 1}, // 64
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{&PartMappings[6], 1}, // 128
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{&PartMappings[7], 1}, // 256
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{&PartMappings[8], 1}, // 512
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{&PartMappings[9], 1}, // 1024
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// VGPRs
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{&PartMappings[9], 1},
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// VGPRs
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{&PartMappings[10], 1}, // 1
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{nullptr, 0},
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{nullptr, 0},
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{nullptr, 0},
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{&PartMappings[10], 1},
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{&PartMappings[11], 1},
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{&PartMappings[12], 1},
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{&PartMappings[13], 1},
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{&PartMappings[14], 1},
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{&PartMappings[15], 1},
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{&PartMappings[16], 1},
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{&PartMappings[17], 1}
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{&PartMappings[11], 1}, // 16
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{&PartMappings[12], 1}, // 32
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{&PartMappings[13], 1}, // 64
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{&PartMappings[14], 1}, // 128
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{&PartMappings[15], 1}, // 256
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{&PartMappings[16], 1}, // 512
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{&PartMappings[17], 1}, // 1024
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{&PartMappings[18], 1},
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{&PartMappings[19], 1}
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};
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const RegisterBankInfo::PartialMapping SGPROnly64BreakDown[] {
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@ -116,7 +122,7 @@ const RegisterBankInfo::ValueMapping ValMappingsSGPR64OnlyVGPR32[] {
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enum ValueMappingIdx {
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SCCStartIdx = 0,
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SGPRStartIdx = 2,
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VGPRStartIdx = 12
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VGPRStartIdx = 13
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};
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const RegisterBankInfo::ValueMapping *getValueMapping(unsigned BankID,
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@ -29,3 +29,31 @@ body: |
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_EXTRACT %0, 0
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...
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---
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name: extract_s32_0_s1024_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
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; CHECK-LABEL: name: extract_s32_0_s1024_v
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s1024) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
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; CHECK: [[EXTRACT:%[0-9]+]]:vgpr(s32) = G_EXTRACT [[COPY]](s1024), 0
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%0:_(s1024) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
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%1:_(s32) = G_EXTRACT %0, 0
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...
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---
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name: extract_s32_0_s1024_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
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; CHECK-LABEL: name: extract_s32_0_s1024_s
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s1024) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
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; CHECK: [[EXTRACT:%[0-9]+]]:sgpr(s32) = G_EXTRACT [[COPY]](s1024), 0
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%0:_(s1024) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
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%1:_(s32) = G_EXTRACT %0, 0
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...
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