forked from OSchip/llvm-project
[ARM] Add FeatureHasNoBranchPredictor for Thumb1 cores
Mark v6m/v8m-baseline cores as having no branch predictors. This should not alter very much on its own, but is more correct as the cores do not have branch predictors and can help in the future.
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@ -1000,10 +1000,14 @@ def : Processor<"arm1136jf-s", ARMV6Itineraries, [ARMv6,
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FeatureVFP2,
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FeatureHasSlowFPVMLx]>;
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def : Processor<"cortex-m0", ARMV6Itineraries, [ARMv6m]>;
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def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m]>;
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def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m]>;
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def : Processor<"sc000", ARMV6Itineraries, [ARMv6m]>;
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def : Processor<"cortex-m0", ARMV6Itineraries, [ARMv6m,
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FeatureHasNoBranchPredictor]>;
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def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m,
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FeatureHasNoBranchPredictor]>;
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def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m,
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FeatureHasNoBranchPredictor]>;
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def : Processor<"sc000", ARMV6Itineraries, [ARMv6m,
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FeatureHasNoBranchPredictor]>;
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def : Processor<"arm1176j-s", ARMV6Itineraries, [ARMv6kz]>;
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def : Processor<"arm1176jz-s", ARMV6Itineraries, [ARMv6kz]>;
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@ -1199,7 +1203,8 @@ def : ProcessorModel<"cortex-m7", CortexM7Model, [ARMv7em,
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FeatureUseMISched]>;
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def : ProcNoItin<"cortex-m23", [ARMv8mBaseline,
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FeatureNoMovt]>;
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FeatureNoMovt,
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FeatureHasNoBranchPredictor]>;
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def : ProcessorModel<"cortex-m33", CortexM4Model, [ARMv8mMainline,
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FeatureDSP,
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