From 3a3e115e81519d176b3a7f235de53d4e8764970f Mon Sep 17 00:00:00 2001 From: Justin Bogner Date: Sat, 13 May 2017 16:24:38 +0000 Subject: [PATCH] MSan: Mark MemorySanitizer tests that use x86 intrinsics as REQUIRES: x86 Tests that use target intrinsics are inherently target specific. Mark them as such. llvm-svn: 302990 --- .../MemorySanitizer/msan_basic.ll | 64 ----------------- .../MemorySanitizer/msan_x86intrinsics.ll | 68 +++++++++++++++++++ .../MemorySanitizer/vector_arith.ll | 1 + .../MemorySanitizer/vector_cmp.ll | 1 + .../MemorySanitizer/vector_cvt.ll | 1 + .../MemorySanitizer/vector_pack.ll | 1 + .../MemorySanitizer/vector_shift.ll | 1 + 7 files changed, 73 insertions(+), 64 deletions(-) create mode 100644 llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll index 4b208d64427b..334e00dabf40 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll @@ -617,70 +617,6 @@ declare i32 @llvm.bswap.i32(i32) nounwind readnone ; CHECK-NOT: call void @__msan_warning ; CHECK: ret i32 - -; Store intrinsic. - -define void @StoreIntrinsic(i8* %p, <4 x float> %x) nounwind uwtable sanitize_memory { - call void @llvm.x86.sse.storeu.ps(i8* %p, <4 x float> %x) - ret void -} - -declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind - -; CHECK-LABEL: @StoreIntrinsic -; CHECK-NOT: br -; CHECK-NOT: = or -; CHECK: store <4 x i32> {{.*}} align 1 -; CHECK: store <4 x float> %{{.*}}, <4 x float>* %{{.*}}, align 1{{$}} -; CHECK: ret void - - -; Load intrinsic. - -define <16 x i8> @LoadIntrinsic(i8* %p) nounwind uwtable sanitize_memory { - %call = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) - ret <16 x i8> %call -} - -declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) nounwind - -; CHECK-LABEL: @LoadIntrinsic -; CHECK: load <16 x i8>, <16 x i8>* {{.*}} align 1 -; CHECK-ORIGINS: [[ORIGIN:%[01-9a-z]+]] = load i32, i32* {{.*}} -; CHECK-NOT: br -; CHECK-NOT: = or -; CHECK: call <16 x i8> @llvm.x86.sse3.ldu.dq -; CHECK: store <16 x i8> {{.*}} @__msan_retval_tls -; CHECK-ORIGINS: store i32 {{.*}}[[ORIGIN]], i32* @__msan_retval_origin_tls -; CHECK: ret <16 x i8> - - -; Simple NoMem intrinsic -; Check that shadow is OR'ed, and origin is Select'ed -; And no shadow checks! - -define <8 x i16> @Paddsw128(<8 x i16> %a, <8 x i16> %b) nounwind uwtable sanitize_memory { - %call = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) - ret <8 x i16> %call -} - -declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind - -; CHECK-LABEL: @Paddsw128 -; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls -; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls -; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls -; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls -; CHECK-NEXT: = or <8 x i16> -; CHECK-ORIGINS: = bitcast <8 x i16> {{.*}} to i128 -; CHECK-ORIGINS-NEXT: = icmp ne i128 {{.*}}, 0 -; CHECK-ORIGINS-NEXT: = select i1 {{.*}}, i32 {{.*}}, i32 -; CHECK-NEXT: call <8 x i16> @llvm.x86.sse2.padds.w -; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls -; CHECK-ORIGINS: store i32 {{.*}} @__msan_retval_origin_tls -; CHECK-NEXT: ret <8 x i16> - - ; Test handling of vectors of pointers. ; Check that shadow of such vector is a vector of integers. diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll new file mode 100644 index 000000000000..be3f1976daa1 --- /dev/null +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll @@ -0,0 +1,68 @@ +; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s +; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=1 -S | FileCheck -check-prefix=CHECK -check-prefix=CHECK-ORIGINS %s +; REQUIRES: x86 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +; Store intrinsic. + +define void @StoreIntrinsic(i8* %p, <4 x float> %x) nounwind uwtable sanitize_memory { + call void @llvm.x86.sse.storeu.ps(i8* %p, <4 x float> %x) + ret void +} + +declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind + +; CHECK-LABEL: @StoreIntrinsic +; CHECK-NOT: br +; CHECK-NOT: = or +; CHECK: store <4 x i32> {{.*}} align 1 +; CHECK: store <4 x float> %{{.*}}, <4 x float>* %{{.*}}, align 1{{$}} +; CHECK: ret void + + +; Load intrinsic. + +define <16 x i8> @LoadIntrinsic(i8* %p) nounwind uwtable sanitize_memory { + %call = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) + ret <16 x i8> %call +} + +declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) nounwind + +; CHECK-LABEL: @LoadIntrinsic +; CHECK: load <16 x i8>, <16 x i8>* {{.*}} align 1 +; CHECK-ORIGINS: [[ORIGIN:%[01-9a-z]+]] = load i32, i32* {{.*}} +; CHECK-NOT: br +; CHECK-NOT: = or +; CHECK: call <16 x i8> @llvm.x86.sse3.ldu.dq +; CHECK: store <16 x i8> {{.*}} @__msan_retval_tls +; CHECK-ORIGINS: store i32 {{.*}}[[ORIGIN]], i32* @__msan_retval_origin_tls +; CHECK: ret <16 x i8> + + +; Simple NoMem intrinsic +; Check that shadow is OR'ed, and origin is Select'ed +; And no shadow checks! + +define <8 x i16> @Paddsw128(<8 x i16> %a, <8 x i16> %b) nounwind uwtable sanitize_memory { + %call = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) + ret <8 x i16> %call +} + +declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind + +; CHECK-LABEL: @Paddsw128 +; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls +; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls +; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls +; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls +; CHECK-NEXT: = or <8 x i16> +; CHECK-ORIGINS: = bitcast <8 x i16> {{.*}} to i128 +; CHECK-ORIGINS-NEXT: = icmp ne i128 {{.*}}, 0 +; CHECK-ORIGINS-NEXT: = select i1 {{.*}}, i32 {{.*}}, i32 +; CHECK-NEXT: call <8 x i16> @llvm.x86.sse2.padds.w +; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls +; CHECK-ORIGINS: store i32 {{.*}} @__msan_retval_origin_tls +; CHECK-NEXT: ret <8 x i16> diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll index 6541a1c3a394..8be085cff33d 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s +; REQUIRES: x86 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_cmp.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_cmp.ll index fb54a5cb632e..62a5f573064e 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/vector_cmp.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/vector_cmp.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s +; REQUIRES: x86 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll index 55e91c74a316..beedb0e63e50 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s +; REQUIRES: x86 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll index 31c0c62980ec..deb03d84802a 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/vector_pack.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s +; REQUIRES: x86 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll index 978bad3b6979..a4b8fdbd603f 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/vector_shift.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s +; REQUIRES: x86 ; Test instrumentation of vector shift instructions.