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builtins: make ARM compilation with GAS work again 

The LLVM IAS seems to accept wide instructions for add and sub in ARM mode even
though it is not permitted.  This uses a macro to ensure that the wide modifier
is only applied when building in THUMB mode.

This repairs building with GCC/GAS in ARM mode.

llvm-svn: 214046
This commit is contained in:
Saleem Abdulrasool 2014-07-27 02:01:24 +00:00
parent b6690c34cf
commit 3a2d6a3096
4 changed files with 11 additions and 5 deletions
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4
compiler-rt/lib/builtins/arm/udivmodsi4.S
View File

@ -112,8 +112,8 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4)
#define block(shift) \
cmp r0, r1, lsl IMM shift; \
ITT(hs); \
addhs.w r3, r3, IMM (1 << shift); \
subhs.w r0, r0, r1, lsl IMM shift
WIDE(addhs) r3, r3, IMM (1 << shift); \
WIDE(subhs) r0, r0, r1, lsl IMM shift
block(31)
block(30)

4
compiler-rt/lib/builtins/arm/udivsi3.S
View File

@ -112,8 +112,8 @@ DEFINE_COMPILERRT_FUNCTION(__udivsi3)
#define block(shift) \
cmp r0, r1, lsl IMM shift; \
ITT(hs); \
addhs.w r3, r3, IMM (1 << shift); \
subhs.w r0, r0, r1, lsl IMM shift
WIDE(addhs) r3, r3, IMM (1 << shift); \
WIDE(subhs) r0, r0, r1, lsl IMM shift
block(31)
block(30)

2
compiler-rt/lib/builtins/arm/umodsi3.S
View File

@ -107,7 +107,7 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
#define block(shift) \
cmp r0, r1, lsl IMM shift; \
IT(hs); \
subhs.w r0, r0, r1, lsl IMM shift
WIDE(subhs) r0, r0, r1, lsl IMM shift
block(31)
block(30)

6
compiler-rt/lib/builtins/assembly.h
View File

@ -99,6 +99,12 @@
#define IT(cond)
#define ITT(cond)
#endif
#if __ARM_ARCH_ISA_THUMB == 2
#define WIDE(op) op.w
#else
#define WIDE(op) op
#endif
#endif
#define GLUE2(a, b) a##b