maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[X86] Add i32 (shl (sr[la] exact sel(X,Y), C1), C2) test 

Shows failure to fold sel(sra(X,C1),sra(Y,C1)) -> sra(sel(X,Y),C1) (and to retain the flags)
This commit is contained in:
Simon Pilgrim 2021-07-18 16:48:40 +01:00
parent 958437de52
commit 3a1b38049a
1 changed files with 19 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
llvm/test/CodeGen/X86/combine-shl.ll
View File

@ -466,6 +466,25 @@ define <4 x i32> @combine_vec_shl_ge_ashr_extact1(<4 x i32> %x) {
ret <4 x i32> %2
}
; fold (shl (sr[la] exact SEL(X,Y), C1), C2) -> (shl SEL(X,Y), (C2-C1)) if C1 <= C2
define i32 @combine_shl_ge_sel_ashr_extact0(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: combine_shl_ge_sel_ashr_extact0:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: shrl $3, %edi
; CHECK-NEXT: shrl $3, %eax
; CHECK-NEXT: testl %edx, %edx
; CHECK-NEXT: cmovnel %edi, %eax
; CHECK-NEXT: shll $5, %eax
; CHECK-NEXT: retq
%cmp = icmp ne i32 %z, 0
%ashrx = ashr exact i32 %x, 3
%ashry = ashr exact i32 %y, 3
%sel = select i1 %cmp, i32 %ashrx, i32 %ashry
%shl = shl i32 %sel, 5
ret i32 %shl
}
; fold (shl (sr[la] exact X, C1), C2) -> (sr[la] X, (C2-C1)) if C1 > C2
define <4 x i32> @combine_vec_shl_lt_ashr_extact0(<4 x i32> %x) {
; SSE-LABEL: combine_vec_shl_lt_ashr_extact0: