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Only derive number of loop iterations for loops we can actually vectorize 

llvm-svn: 245870
This commit is contained in:
Tobias Grosser 2015-08-24 20:11:34 +00:00
parent 6b2765fe49
commit 39f9f30e8b
2 changed files with 98 additions and 0 deletions
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27
polly/lib/CodeGen/IslNodeBuilder.cpp
View File

@ -121,6 +121,33 @@ static bool checkIslAstExprInt(__isl_take isl_ast_expr *Expr,
int IslNodeBuilder::getNumberOfIterations(__isl_keep isl_ast_node *For) {
assert(isl_ast_node_get_type(For) == isl_ast_node_for);
auto Body = isl_ast_node_for_get_body(For);
// First, check if we can actually handle this code
switch (isl_ast_node_get_type(Body)) {
case isl_ast_node_user:
break;
case isl_ast_node_block: {
isl_ast_node_list *List = isl_ast_node_block_get_children(Body);
for (int i = 0; i < isl_ast_node_list_n_ast_node(List); ++i) {
isl_ast_node *Node = isl_ast_node_list_get_ast_node(List, i);
int Type = isl_ast_node_get_type(Node);
isl_ast_node_free(Node);
if (Type != isl_ast_node_user) {
isl_ast_node_list_free(List);
isl_ast_node_free(Body);
return -1;
}
}
isl_ast_node_list_free(List);
break;
}
default:
isl_ast_node_free(Body);
return -1;
}
isl_ast_node_free(Body);
auto Init = isl_ast_node_for_get_init(For);
if (!checkIslAstExprInt(Init, isl_val_is_zero))
return -1;

71
polly/test/Isl/CodeGen/if-conditions-in-vector-code.ll Normal file
View File

@ -0,0 +1,71 @@
; RUN: opt %loadPolly -analyze -polly-ast -polly-vectorizer=polly < %s | \
; RUN: FileCheck %s -check-prefix=AST
; RUN: opt %loadPolly -polly-codegen -polly-vectorizer=polly -S < %s | \
; RUN: FileCheck %s
;
; void foo(float *A) {
; for (long i = 0; i < 16; i++) {
; if (i % 2)
; A[i] += 2;
; if (i % 3)
; A[i] += 3;
; }
; }
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; AST: #pragma simd
; AST: #pragma known-parallel
; AST: for (int c0 = 0; c0 <= 15; c0 += 1) {
; AST: if ((c0 - 1) % 2 == 0)
; AST: Stmt_bb4(c0);
; AST: if (c0 % 3 >= 1)
; AST: Stmt_bb11(c0);
; AST: }
; CHECK: polly.split_new_and_old
define void @foo(float* %A) {
bb:
br label %bb1
bb1: ; preds = %bb16, %bb
%i.0 = phi i64 [ 0, %bb ], [ %tmp17, %bb16 ]
%exitcond = icmp ne i64 %i.0, 16
br i1 %exitcond, label %bb2, label %bb18
bb2: ; preds = %bb1
%tmp = srem i64 %i.0, 2
%tmp3 = icmp eq i64 %tmp, 0
br i1 %tmp3, label %bb8, label %bb4
bb4: ; preds = %bb2
%tmp5 = getelementptr inbounds float, float* %A, i64 %i.0
%tmp6 = load float, float* %tmp5, align 4
%tmp7 = fadd float %tmp6, 2.000000e+00
store float %tmp7, float* %tmp5, align 4
br label %bb8
bb8: ; preds = %bb2, %bb4
%tmp9 = srem i64 %i.0, 3
%tmp10 = icmp eq i64 %tmp9, 0
br i1 %tmp10, label %bb15, label %bb11
bb11: ; preds = %bb8
%tmp12 = getelementptr inbounds float, float* %A, i64 %i.0
%tmp13 = load float, float* %tmp12, align 4
%tmp14 = fadd float %tmp13, 3.000000e+00
store float %tmp14, float* %tmp12, align 4
br label %bb15
bb15: ; preds = %bb8, %bb11
br label %bb16
bb16: ; preds = %bb15
%tmp17 = add nsw i64 %i.0, 1
br label %bb1
bb18: ; preds = %bb1
ret void
}