forked from OSchip/llvm-project
[BOLT] Add support for IFUNC
Summary: Relocation value verification was failing for IFUNC as the real value used for relocation wasn't the symbol value, but a corresponding PLT entry. Relax the verification and skip any symbols of ST_Other type. (cherry picked from FBD9123741)
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@ -1859,7 +1859,7 @@ bool RewriteInstance::analyzeRelocation(const RelocationRef &Rel,
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auto SymbolIter = Rel.getSymbol();
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assert(SymbolIter != InputFile->symbol_end() &&
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"relocation symbol must exist");
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auto Symbol = *SymbolIter;
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const auto &Symbol = *SymbolIter;
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SymbolName = cantFail(Symbol.getName());
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SymbolAddress = cantFail(Symbol.getAddress());
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Addend = getRelocationAddend(InputFile, Rel);
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@ -1920,67 +1920,24 @@ bool RewriteInstance::analyzeRelocation(const RelocationRef &Rel,
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}
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}
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if (!IsPCRelative && Addend != 0 && IsFromCode && !SymbolIsSection) {
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// TODO: RefSection should be the same as **(Symbol.getSection()).
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auto RefSection = BC->getSectionForAddress(SymbolAddress);
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if (RefSection && RefSection->isText()) {
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if (opts::Verbosity > 1) {
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SmallString<16> TypeName;
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Rel.getTypeName(TypeName);
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errs() << "BOLT-WARNING: detected absolute reference from code into "
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<< "a middle of a function:\n"
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<< " offset = 0x" << Twine::utohexstr(Rel.getOffset())
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<< "; type = " << Rel.getType()
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<< "; type name = " << TypeName
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<< "; value = 0x" << Twine::utohexstr(ExtractedValue)
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<< "; symbol = " << SymbolName
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<< "; symbol address = 0x" << Twine::utohexstr(SymbolAddress)
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<< "; symbol section = " << RefSection->getName()
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<< "; addend = 0x" << Twine::utohexstr(Addend)
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<< "; address = 0x" << Twine::utohexstr(SymbolAddress + Addend)
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<< '\n';
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}
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assert(truncateToSize(ExtractedValue, RelSize) ==
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truncateToSize(SymbolAddress + Addend, RelSize) &&
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"value mismatch");
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}
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}
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auto verifyExtractedValue = [&]() {
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if (IsAArch64)
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return true;
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DEBUG(
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if (!Relocation::isTLS(Rel.getType()) &&
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SymbolName != "__hot_start" &&
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SymbolName != "__hot_end" &&
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truncateToSize(ExtractedValue, RelSize) !=
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truncateToSize(SymbolAddress + Addend - PCRelOffset, RelSize)) {
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auto Section = cantFail(Symbol.getSection());
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SmallString<16> TypeName;
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Rel.getTypeName(TypeName);
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dbgs() << "BOLT-DEBUG: Mismatch between extracted value and relocation "
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<< "data:\n"
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<< "BOLT-DEBUG: offset = 0x"
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<< Twine::utohexstr(Rel.getOffset())
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<< "; type = " << Rel.getType()
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<< "; type name = " << TypeName
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<< "; value = 0x" << Twine::utohexstr(ExtractedValue)
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<< "; symbol = " << SymbolName
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<< "; symbol type = " << cantFail(Symbol.getType())
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<< "; symbol address = 0x" << Twine::utohexstr(SymbolAddress)
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<< "; orig symbol address = 0x"
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<< Twine::utohexstr(cantFail(Symbol.getAddress()))
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<< "; symbol section = " << getSectionName(*Section)
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<< "; addend = 0x" << Twine::utohexstr(Addend)
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<< "; original addend = 0x"
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<< Twine::utohexstr(getRelocationAddend(InputFile, Rel))
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<< '\n';
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});
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if (SymbolName == "__hot_start" || SymbolName == "__hot_end")
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return true;
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assert((IsAArch64 ||
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Relocation::isTLS(Rel.getType()) ||
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SymbolName == "__hot_start" ||
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SymbolName == "__hot_end" ||
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truncateToSize(ExtractedValue, RelSize) ==
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truncateToSize(SymbolAddress + Addend - PCRelOffset, RelSize)) &&
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"extracted relocation value should match relocation components");
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if (Relocation::isTLS(Rel.getType()))
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return true;
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if (cantFail(Symbol.getType()) == SymbolRef::ST_Other)
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return true;
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return truncateToSize(ExtractedValue, RelSize) ==
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truncateToSize(SymbolAddress + Addend - PCRelOffset, RelSize);
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};
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assert(verifyExtractedValue() && "mismatched extracted relocation value");
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return true;
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}
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