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remove some dead target hooks, subsumed by isLegalAddressingMode 

llvm-svn: 35840
This commit is contained in:
Chris Lattner 2007-04-09 22:27:04 +00:00
parent 83efbc84f7
commit 39f65335d5
6 changed files with 0 additions and 86 deletions
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11
llvm/include/llvm/Target/TargetLowering.h
View File

@ -893,17 +893,6 @@ public:
/// scale of the target addressing mode for load / store of the given type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and V works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
const Type* Ty) const;
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and GV works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
const Type* Ty) const;
//===--------------------------------------------------------------------===//
// Div utility functions
//

17
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@ -1993,23 +1993,6 @@ bool TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
return false;
}
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and V works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
const Type* Ty) const {
return false;
}
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and GV works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
const Type* Ty) const {
return false;
}
// Magic for divide replacement
struct ms {

18
llvm/lib/Target/ARM/ARMISelLowering.cpp
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@ -1441,24 +1441,6 @@ bool ARMTargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
}
}
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and V works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
const Type* Ty) const {
if (V == 0)
return isLegalAddressScale(S, Ty);
return false;
}
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and GV works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
const Type* Ty) const {
return false;
}
static bool getIndexedAddressParts(SDNode *Ptr, MVT::ValueType VT,
bool isSEXTLoad, SDOperand &Base,
SDOperand &Offset, bool &isInc,

12
llvm/lib/Target/ARM/ARMISelLowering.h
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@ -99,18 +99,6 @@ namespace llvm {
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
/// isLegalAddressScaleAndImm - Return true if S works for
/// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
/// both can be applied simultaneously to the same instruction.
virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
const Type *Ty) const;
/// isLegalAddressScaleAndImm - Return true if S works for
/// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
/// both can be applied simultaneously to the same instruction.
virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
const Type *Ty) const;
/// getPreIndexedAddressParts - returns true by value, base pointer and
/// offset pointer and addressing mode by reference if the node's address
/// can be legally represented as pre-indexed load / store address.

16
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -4127,22 +4127,6 @@ bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
}
}
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and V works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
const Type* Ty) const {
return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty);
}
/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
/// and GV works for isLegalAddressImmediate _and_ both can be applied
/// simultaneously to the same instruction.
bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
const Type* Ty) const {
return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV);
}
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values

12
llvm/lib/Target/X86/X86ISelLowering.h
View File

@ -353,18 +353,6 @@ namespace llvm {
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
/// isLegalAddressScaleAndImm - Return true if S works for
/// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
/// both can be applied simultaneously to the same instruction.
virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
const Type *Ty) const;
/// isLegalAddressScaleAndImm - Return true if S works for
/// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
/// both can be applied simultaneously to the same instruction.
virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
const Type *Ty) const;
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask