forked from OSchip/llvm-project
[AArch64][ASMParser] Refuse equal source/destination for LDRAA/LDRAB
Differential Revision: https://reviews.llvm.org/D74822
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@ -4114,6 +4114,16 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
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"unpredictable STXP instruction, status is also a source");
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break;
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}
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case AArch64::LDRABwriteback:
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case AArch64::LDRAAwriteback: {
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unsigned Xt = Inst.getOperand(0).getReg();
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unsigned Xn = Inst.getOperand(1).getReg();
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if (Xt == Xn)
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return Error(Loc[0],
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"unpredictable LDRA instruction, writeback base"
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" is also a destination");
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break;
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}
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}
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@ -18,3 +18,15 @@
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// CHECK: error: index must be a multiple of 8 in range [-4096, 4088].
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ldrab x0, [x1, 4086]
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// CHECK: error: index must be a multiple of 8 in range [-4096, 4088].
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ldraa x0, [x0, -4096]!
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable LDRA instruction, writeback base is also a destination
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ldrab x0, [x0, -4096]!
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable LDRA instruction, writeback base is also a destination
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ldraa xzr, [xzr, -4096]!
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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ldraa sp, [sp, -4096]!
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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ldrab xzr, [xzr, -4096]!
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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ldrab sp, [sp, -4096]!
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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@ -327,3 +327,11 @@
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// CHECK-NEXT: ldrab x0, [x1, #0]! // encoding: [0x20,0x0c,0xa0,0xf8]
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// CHECK-REQ: error: instruction requires: pa
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// CHECK-REQ-NEXT: ldrab x0, [x1]!
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ldraa xzr, [sp, -4096]!
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// CHECK-NEXT: ldraa xzr, [sp, #-4096]! // encoding: [0xff,0x0f,0x60,0xf8]
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// CHECK-REQ: error: instruction requires: pa
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// CHECK-REQ-NEXT: ldraa xzr, [sp, -4096]!
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ldrab xzr, [sp, -4096]!
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// CHECK-NEXT: ldrab xzr, [sp, #-4096]! // encoding: [0xff,0x0f,0xe0,0xf8]
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// CHECK-REQ: error: instruction requires: pa
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// CHECK-REQ-NEXT: ldrab xzr, [sp, -4096]!
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