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use continue to reduce nesting. 

llvm-svn: 104330
This commit is contained in:
Chris Lattner 2010-05-21 18:01:24 +00:00
parent b7d68a2256
commit 39a8a43bd8
1 changed files with 17 additions and 14 deletions
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31
llvm/lib/Target/X86/X86FloatingPointRegKill.cpp
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@ -57,22 +57,25 @@ FunctionPass *llvm::createX87FPRegKillInserterPass() {
/// stack code, and thus needs an FP_REG_KILL. /// stack code, and thus needs an FP_REG_KILL.
static bool ContainsFPStackCode(MachineBasicBlock *MBB, unsigned SSELevel, static bool ContainsFPStackCode(MachineBasicBlock *MBB, unsigned SSELevel,
MachineRegisterInfo &MRI) { MachineRegisterInfo &MRI) {
// Scan the block, looking for instructions that define fp stack vregs.
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) { I != E; ++I) {
if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) { if (I->getNumOperands() == 0 || !I->getOperand(0).isReg())
for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) { continue;
if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg())) { for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
const TargetRegisterClass *RegClass = if (!I->getOperand(op).isReg() || !I->getOperand(op).isDef() ||
MRI.getRegClass(I->getOperand(op).getReg()); !TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()))
continue;
if (RegClass == X86::RFP32RegisterClass ||
RegClass == X86::RFP64RegisterClass || const TargetRegisterClass *RegClass =
RegClass == X86::RFP80RegisterClass) MRI.getRegClass(I->getOperand(op).getReg());
return true;
} switch (RegClass->getID())
} case X86::RFP32RegClassID:
case X86::RFP64RegClassID:
case X86::RFP80RegClassID:
return true;
} }
} }