forked from OSchip/llvm-project
Use enums instead of literals for X86 subregisters.
The cases in getMatchingSuperRegClass cannot be broken up until the enums have unique values. llvm-svn: 104611
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@ -744,17 +744,17 @@ X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
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case X86::MOVZX32rr8:
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case X86::MOVSX64rr8:
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case X86::MOVZX64rr8:
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SubIdx = 1;
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SubIdx = X86::sub_8bit;
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break;
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case X86::MOVSX32rr16:
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case X86::MOVZX32rr16:
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case X86::MOVSX64rr16:
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case X86::MOVZX64rr16:
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SubIdx = 3;
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SubIdx = X86::sub_16bit;
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break;
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case X86::MOVSX64rr32:
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case X86::MOVZX64rr32:
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SubIdx = 4;
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SubIdx = X86::sub_32bit;
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break;
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}
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return true;
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@ -157,8 +157,8 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
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unsigned SubIdx) const {
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switch (SubIdx) {
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default: return 0;
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case 1:
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// 8-bit
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case X86::sub_8bit:
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//case X86::sub_ss:
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if (B == &X86::GR8RegClass) {
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if (A->getSize() == 2 || A->getSize() == 4 || A->getSize() == 8)
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return A;
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@ -194,8 +194,8 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
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return A;
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}
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break;
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case 2:
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// 8-bit hi
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case X86::sub_8bit_hi:
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//case X86::sub_sd:
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if (B == &X86::GR8_ABCD_HRegClass) {
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if (A == &X86::GR64RegClass || A == &X86::GR64_ABCDRegClass ||
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A == &X86::GR64_NOREXRegClass ||
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@ -212,8 +212,8 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
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return A;
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}
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break;
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case 3:
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// 16-bit
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case X86::sub_16bit:
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//case X86::sub_xmm:
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if (B == &X86::GR16RegClass) {
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if (A->getSize() == 4 || A->getSize() == 8)
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return A;
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@ -241,8 +241,7 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
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return A;
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}
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break;
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case 4:
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// 32-bit
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case X86::sub_32bit:
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if (B == &X86::GR32RegClass || B == &X86::GR32_NOSPRegClass) {
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if (A->getSize() == 8)
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return A;
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