forked from OSchip/llvm-project
[AArch64] Remove command-line option use for testing.
The EXTR combine has been in tree for over 2 years without complain, so go ahead and remove the option. llvm-svn: 269292
This commit is contained in:
parent
5bdf86ec7c
commit
39481ace40
|
@ -40,12 +40,6 @@ using namespace llvm;
|
|||
STATISTIC(NumTailCalls, "Number of tail calls");
|
||||
STATISTIC(NumShiftInserts, "Number of vector shift inserts");
|
||||
|
||||
// Place holder until extr generation is tested fully.
|
||||
static cl::opt<bool>
|
||||
EnableAArch64ExtrGeneration("aarch64-extr-generation", cl::Hidden,
|
||||
cl::desc("Allow AArch64 (or (shift)(shift))->extract"),
|
||||
cl::init(true));
|
||||
|
||||
static cl::opt<bool>
|
||||
EnableAArch64SlrGeneration("aarch64-shift-insert-generation", cl::Hidden,
|
||||
cl::desc("Allow AArch64 SLI/SRI formation"),
|
||||
|
@ -7992,8 +7986,6 @@ static SDValue tryCombineToBSL(SDNode *N,
|
|||
static SDValue performORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI,
|
||||
const AArch64Subtarget *Subtarget) {
|
||||
// Attempt to form an EXTR from (or (shl VAL1, #N), (srl VAL2, #RegWidth-N))
|
||||
if (!EnableAArch64ExtrGeneration)
|
||||
return SDValue();
|
||||
SelectionDAG &DAG = DCI.DAG;
|
||||
EVT VT = N->getValueType(0);
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
; RUN: llc -aarch64-extr-generation=true -verify-machineinstrs < %s \
|
||||
; RUN: llc -verify-machineinstrs < %s \
|
||||
; RUN: -march=arm64 | FileCheck %s
|
||||
|
||||
define i64 @ror_i64(i64 %in) {
|
||||
|
|
Loading…
Reference in New Issue