forked from OSchip/llvm-project
First attempt at special-casing printing of [%reg + offset] for
ld/st instructions - doesn't seem to work yet, but I think it's just a typo or something somewhere. llvm-svn: 12727
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@ -69,6 +69,7 @@ namespace {
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void emitGlobalConstant(const Constant *CV);
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void printConstantPool(MachineConstantPool *MCP);
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void printOperand(const MachineOperand &MI);
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void printBaseOffsetPair (const MachineInstr *MI, int i);
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void printMachineInstruction(const MachineInstr *MI);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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@ -419,6 +420,43 @@ void V8Printer::printOperand(const MachineOperand &MO) {
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}
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}
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static bool isLoadInstruction (const MachineInstr *MI) {
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switch (MI->getOpcode ()) {
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case V8::LDSBmr:
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case V8::LDSHmr:
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case V8::LDUBmr:
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case V8::LDUHmr:
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case V8::LDmr:
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case V8::LDDmr:
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return true;
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default:
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return false;
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}
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}
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static bool isStoreInstruction (const MachineInstr *MI) {
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switch (MI->getOpcode ()) {
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case V8::STBrm:
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case V8::STHrm:
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case V8::STrm:
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case V8::STDrm:
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return true;
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default:
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return false;
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}
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}
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void V8Printer::printBaseOffsetPair (const MachineInstr *MI, int i) {
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O << "[";
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printOperand (MI->getOperand (i));
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assert (MI->getOperand (i + 1).isImmediate()
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&& "2nd half of base-offset pair must be immediate-value machine operand");
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int Val = (int) MI->getOperand (i + 1).getImmedValue ();
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O << ((Val >= 0) ? " + " : " - ");
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O << ((Val >= 0) ? Val : -Val);
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O << "]";
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}
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/// printMachineInstruction -- Print out a single SparcV8 LLVM instruction
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/// MI in GAS syntax to the current output stream.
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///
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@ -428,6 +466,23 @@ void V8Printer::printMachineInstruction(const MachineInstr *MI) {
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const TargetInstrDescriptor &Desc = TII.get(Opcode);
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O << Desc.Name << " ";
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// Printing memory instructions is a special case.
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// for loads: op %base, offset, %dest --> op [%base + offset], %dest
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// for stores: op %src, %base, offset --> op %src, [%base + offset]
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if (isLoadInstruction (MI)) {
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printBaseOffsetPair (MI, 0);
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O << ", ";
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printOperand (MI->getOperand (2));
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O << "\n";
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return;
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} else if (isStoreInstruction (MI)) {
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printOperand (MI->getOperand (0));
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O << ", ";
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printBaseOffsetPair (MI, 1);
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O << "\n";
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return;
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}
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// print non-immediate, non-register-def operands
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// then print immediate operands
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// then print register-def operands.
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