forked from OSchip/llvm-project
[X86][AVX] Tidied up BROADCASTPD/BROADCASTPS tests
Regenerate tests using update_llc_test_checks.py llvm-svn: 254886
This commit is contained in:
Simon Pilgrim
parent
ea39de81e4
commit
38e93ea1cc
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@ -1,7 +1,11 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; CHECK: vbroadcastsd (%
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define <4 x i64> @A(i64* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: A:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
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; CHECK-NEXT: retq
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entry:
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%q = load i64, i64* %ptr, align 8
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%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
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@ -11,8 +15,11 @@ entry:
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ret <4 x i64> %vecinit6.i
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}
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; CHECK: vbroadcastss (%
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define <8 x i32> @B(i32* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: B:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
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; CHECK-NEXT: retq
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entry:
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%q = load i32, i32* %ptr, align 4
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%vecinit.i = insertelement <8 x i32> undef, i32 %q, i32 0
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@ -22,8 +29,11 @@ entry:
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ret <8 x i32> %vecinit6.i
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}
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; CHECK: vbroadcastsd (%
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define <4 x double> @C(double* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: C:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
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; CHECK-NEXT: retq
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entry:
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%q = load double, double* %ptr, align 8
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%vecinit.i = insertelement <4 x double> undef, double %q, i32 0
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@ -33,8 +43,11 @@ entry:
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ret <4 x double> %vecinit6.i
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}
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; CHECK: vbroadcastss (%
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define <8 x float> @D(float* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: D:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
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; CHECK-NEXT: retq
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entry:
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%q = load float, float* %ptr, align 4
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%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
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@ -46,8 +59,11 @@ entry:
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;;;; 128-bit versions
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; CHECK: vbroadcastss (%
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define <4 x float> @e(float* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: e:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
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; CHECK-NEXT: retq
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entry:
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%q = load float, float* %ptr, align 4
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%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
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@ -57,12 +73,14 @@ entry:
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ret <4 x float> %vecinit6.i
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}
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; CHECK: _e2
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; CHECK-NOT: vbroadcastss
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; CHECK: ret
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; Don't broadcast constants on pre-AVX2 hardware.
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define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
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%vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0
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; CHECK-LABEL: _e2:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-7.812500e-03,-7.812500e-03,-7.812500e-03,-7.812500e-03]
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; CHECK-NEXT: retq
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entry:
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%vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0
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%vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1
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%vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2
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%vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3
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@ -70,8 +88,11 @@ define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
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}
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; CHECK: vbroadcastss (%
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define <4 x i32> @F(i32* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: F:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
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; CHECK-NEXT: retq
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entry:
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%q = load i32, i32* %ptr, align 4
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%vecinit.i = insertelement <4 x i32> undef, i32 %q, i32 0
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@ -83,10 +104,12 @@ entry:
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; Unsupported vbroadcasts
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; CHECK: _G
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; CHECK-NOT: broadcast (%
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; CHECK: ret
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define <2 x i64> @G(i64* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: G:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; CHECK-NEXT: retq
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entry:
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%q = load i64, i64* %ptr, align 8
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%vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
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@ -94,18 +117,21 @@ entry:
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ret <2 x i64> %vecinit2.i
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}
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; CHECK: _H
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; CHECK-NOT: broadcast
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; CHECK: ret
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define <4 x i32> @H(<4 x i32> %a) {
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; CHECK-LABEL: H:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; CHECK-NEXT: retq
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entry:
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%x = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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ret <4 x i32> %x
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}
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; CHECK: _I
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; CHECK-NOT: broadcast (%
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; CHECK: ret
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define <2 x double> @I(double* %ptr) nounwind uwtable readnone ssp {
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; CHECK-LABEL: I:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
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; CHECK-NEXT: retq
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entry:
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%q = load double, double* %ptr, align 4
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%vecinit.i = insertelement <2 x double> undef, double %q, i32 0
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@ -113,10 +139,13 @@ entry:
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ret <2 x double> %vecinit2.i
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}
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; CHECK: _RR
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; CHECK: vbroadcastss (%
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; CHECK: ret
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define <4 x float> @_RR(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
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; CHECK-LABEL: _RR:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: movl %eax, (%rax)
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; CHECK-NEXT: retq
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entry:
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%q = load float, float* %ptr, align 4
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%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
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@ -129,11 +158,11 @@ entry:
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ret <4 x float> %vecinit6.i
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}
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; CHECK: _RR2
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; CHECK: vbroadcastss (%
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; CHECK: ret
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define <4 x float> @_RR2(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
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; CHECK-LABEL: _RR2:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
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; CHECK-NEXT: retq
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entry:
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%q = load float, float* %ptr, align 4
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%v = insertelement <4 x float> undef, float %q, i32 0
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@ -141,16 +170,15 @@ entry:
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ret <4 x float> %t
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}
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; These tests check that a vbroadcast instruction is used when we have a splat
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; formed from a concat_vectors (via the shufflevector) of two BUILD_VECTORs
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; (via the insertelements).
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; CHECK-LABEL: splat_concat1
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; CHECK-NOT: vinsertf128
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; CHECK: vbroadcastss (%
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; CHECK-NEXT: ret
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define <8 x float> @splat_concat1(float* %p) {
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; CHECK-LABEL: splat_concat1:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
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; CHECK-NEXT: retq
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%1 = load float, float* %p, align 4
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%2 = insertelement <4 x float> undef, float %1, i32 0
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%3 = insertelement <4 x float> %2, float %1, i32 1
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@ -160,11 +188,11 @@ define <8 x float> @splat_concat1(float* %p) {
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ret <8 x float> %6
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}
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; CHECK-LABEL: splat_concat2
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; CHECK-NOT: vinsertf128
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; CHECK: vbroadcastss (%
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; CHECK-NEXT: ret
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define <8 x float> @splat_concat2(float* %p) {
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; CHECK-LABEL: splat_concat2:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
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; CHECK-NEXT: retq
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%1 = load float, float* %p, align 4
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%2 = insertelement <4 x float> undef, float %1, i32 0
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%3 = insertelement <4 x float> %2, float %1, i32 1
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@ -178,11 +206,11 @@ define <8 x float> @splat_concat2(float* %p) {
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ret <8 x float> %10
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}
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; CHECK-LABEL: splat_concat3
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; CHECK-NOT: vinsertf128
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; CHECK: vbroadcastsd (%
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; CHECK-NEXT: ret
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define <4 x double> @splat_concat3(double* %p) {
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; CHECK-LABEL: splat_concat3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
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; CHECK-NEXT: retq
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%1 = load double, double* %p, align 8
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%2 = insertelement <2 x double> undef, double %1, i32 0
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%3 = insertelement <2 x double> %2, double %1, i32 1
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@ -190,11 +218,11 @@ define <4 x double> @splat_concat3(double* %p) {
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ret <4 x double> %4
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}
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; CHECK-LABEL: splat_concat4
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; CHECK-NOT: vinsertf128
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; CHECK: vbroadcastsd (%
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; CHECK-NEXT: ret
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define <4 x double> @splat_concat4(double* %p) {
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; CHECK-LABEL: splat_concat4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
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; CHECK-NEXT: retq
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%1 = load double, double* %p, align 8
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%2 = insertelement <2 x double> undef, double %1, i32 0
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%3 = insertelement <2 x double> %2, double %1, i32 1
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@ -203,4 +231,3 @@ define <4 x double> @splat_concat4(double* %p) {
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%6 = shufflevector <2 x double> %3, <2 x double> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x double> %6
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}
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