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remove a bunch of comments 

llvm-svn: 30038
This commit is contained in:
Chris Lattner 2006-09-01 22:16:22 +00:00
parent 70fd01a1b8
commit 38e6d1d5af
1 changed files with 0 additions and 54 deletions
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54
llvm/lib/Target/Sparc/SparcInstrInfo.td
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@ -515,60 +515,6 @@ def SMULri : F3_2<2, 0b001011,
"smul $b, $c, $dst",
[(set IntRegs:$dst, (mul IntRegs:$b, simm13:$c))]>;
/*
//===-------------------------
// Sparc Example
defm intinst{OPC1, OPC2}<bits Opc, string asmstr, SDNode code> {
def OPC1 : F3_1<2, Opc, asmstr, (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
[(set IntRegs:$dst, (code IntRegs:$b, IntRegs:$c))]>;
def OPC2 : F3_2<2, Opc, asmstr, (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
[(set IntRegs:$dst, (code IntRegs:$b, simm13:$c))]>;
}
defm intinst_np{OPC1, OPC2}<bits Opc, string asmstr> {
def OPC1 : F3_1<2, Opc, asmstr, (ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
[]>;
def OPC2 : F3_2<2, Opc, asmstr, (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
[]>;
}
def { ADDXrr, ADDXri} : intinstnp<0b001000, "addx $b, $c, $dst">;
def { SUBrr, SUBri} : intinst <0b000100, "sub $b, $c, $dst", sub>;
def intinstnp{ SUBXrr, SUBXri}<0b001100, "subx $b, $c, $dst">;
def intinst {SUBCCrr, SUBCCri}<0b010100, "subcc $b, $c, $dst", SPcmpicc>;
def intinst { SMULrr, SMULri}<0b001011, "smul $b, $c, $dst", mul>;
//===-------------------------
// X86 Example
defm cmov32<id OPC1, id OPC2, int opc, string asmstr, PatLeaf cond> {
def OPC1 : I<opc, MRMSrcReg, (ops R32:$dst, R32:$src1, R32:$src2),
asmstr+" {$src2, $dst|$dst, $src2}",
[(set R32:$dst, (X86cmov R32:$src1, R32:$src2, cond))]>, TB;
def OPC2 : I<opc, MRMSrcMem, (ops R32:$dst, R32:$src1, i32mem:$src2),
asmstr+" {$src2, $dst|$dst, $src2}",
[(set R32:$dst, (X86cmov R32:$src1,
(loadi32 addr:$src2), cond))]>, TB;
}
def cmov<CMOVL32rr, CMOVL32rm, 0x4C, "cmovl", X86_COND_L>;
def cmov<CMOVB32rr, CMOVB32rm, 0x4C, "cmovb", X86_COND_B>;
//===-------------------------
// PPC Example
def fpunop<id OPC1, id OPC2, id FORM, int op1, int op2, int op3, string asmstr,
SDNode code> {
def OPC1 : FORM<op1, op3, (ops F4RC:$frD, F4RC:$frB),
asmstr+" $frD, $frB", FPGeneral,
[(set F4RC:$frD, (code F4RC:$frB))]>;
def OPC2 : FORM<op2, op3, (ops F8RC:$frD, F8RC:$frB),
asmstr+" $frD, $frB", FPGeneral,
[(set F8RC:$frD, (code F8RC:$frB))]>;
}
def fpunop< FABSS, FABSD, XForm_26, 63, 63, 264, "fabs", fabs>;
def fpunop<FNABSS, FNABSD, XForm_26, 63, 63, 136, "fnabs", fnabs>;
def fpunop< FNEGS, FNEGD, XForm_26, 63, 63, 40, "fneg", fneg>;
*/
// Section B.19 - Divide Instructions, p. 115
def UDIVrr : F3_1<2, 0b001110,