From 38a91a0de661967b3609d044e63985101d69e153 Mon Sep 17 00:00:00 2001 From: Volkan Keles Date: Mon, 13 Mar 2017 21:36:19 +0000 Subject: [PATCH] GlobalISel: Translate ConstantDataVector Reviewers: qcolombet, aditya_nandakumar, dsanders, t.p.northover, javed.absar, ab Reviewed By: qcolombet, dsanders, ab Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30216 llvm-svn: 297670 --- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 7 ++++ .../AArch64/GlobalISel/arm64-irtranslator.ll | 40 +++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 7e6c61dfca67..15bf31cd6d6c 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1074,6 +1074,13 @@ bool IRTranslator::translate(const Constant &C, unsigned Reg) { Ops.push_back(getOrCreateVReg(Elt)); } EntryBuilder.buildMerge(Reg, Ops); + } else if (auto CV = dyn_cast(&C)) { + std::vector Ops; + for (unsigned i = 0; i < CV->getNumElements(); ++i) { + Constant &Elt = *CV->getElementAsConstant(i); + Ops.push_back(getOrCreateVReg(Elt)); + } + EntryBuilder.buildMerge(Reg, Ops); } else if (auto CE = dyn_cast(&C)) { switch(CE->getOpcode()) { #define HANDLE_INST(NUM, OPCODE, CLASS) \ diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 8d652098dd50..8003cb95a3cb 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -1328,3 +1328,43 @@ define i32 @test_constantaggzerovector_v3i32() { %elt = extractelement <3 x i32> zeroinitializer, i32 1 ret i32 %elt } + +define <2 x i32> @test_constantdatavector_v2i32() { +; CHECK-LABEL: name: test_constantdatavector_v2i32 +; CHECK: [[C1:%[0-9]+]](s32) = G_CONSTANT i32 1 +; CHECK: [[C2:%[0-9]+]](s32) = G_CONSTANT i32 2 +; CHECK: [[VEC:%[0-9]+]](<2 x s32>) = G_MERGE_VALUES [[C1]](s32), [[C2]](s32) +; CHECK: %d0 = COPY [[VEC]](<2 x s32>) + ret <2 x i32> +} + +define i32 @test_constantdatavector_v3i32() { +; CHECK-LABEL: name: test_constantdatavector_v3i32 +; CHECK: [[C1:%[0-9]+]](s32) = G_CONSTANT i32 1 +; CHECK: [[C2:%[0-9]+]](s32) = G_CONSTANT i32 2 +; CHECK: [[C3:%[0-9]+]](s32) = G_CONSTANT i32 3 +; CHECK: [[VEC:%[0-9]+]](<3 x s32>) = G_MERGE_VALUES [[C1]](s32), [[C2]](s32), [[C3]](s32) +; CHECK: G_EXTRACT_VECTOR_ELT [[VEC]](<3 x s32>) + %elt = extractelement <3 x i32> , i32 1 + ret i32 %elt +} + +define <4 x i32> @test_constantdatavector_v4i32() { +; CHECK-LABEL: name: test_constantdatavector_v4i32 +; CHECK: [[C1:%[0-9]+]](s32) = G_CONSTANT i32 1 +; CHECK: [[C2:%[0-9]+]](s32) = G_CONSTANT i32 2 +; CHECK: [[C3:%[0-9]+]](s32) = G_CONSTANT i32 3 +; CHECK: [[C4:%[0-9]+]](s32) = G_CONSTANT i32 4 +; CHECK: [[VEC:%[0-9]+]](<4 x s32>) = G_MERGE_VALUES [[C1]](s32), [[C2]](s32), [[C3]](s32), [[C4]](s32) +; CHECK: %q0 = COPY [[VEC]](<4 x s32>) + ret <4 x i32> +} + +define <2 x double> @test_constantdatavector_v2f64() { +; CHECK-LABEL: name: test_constantdatavector_v2f64 +; CHECK: [[FC1:%[0-9]+]](s64) = G_FCONSTANT double 1.000000e+00 +; CHECK: [[FC2:%[0-9]+]](s64) = G_FCONSTANT double 2.000000e+00 +; CHECK: [[VEC:%[0-9]+]](<2 x s64>) = G_MERGE_VALUES [[FC1]](s64), [[FC2]](s64) +; CHECK: %q0 = COPY [[VEC]](<2 x s64>) + ret <2 x double> +}