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Move PPC bits to lib/Target/PowerPC. 

llvm-svn: 147124
This commit is contained in:
Rafael Espindola 2011-12-22 01:57:09 +00:00
parent 022857e03d
commit 38a400df3b
6 changed files with 123 additions and 94 deletions
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3
llvm/include/llvm/MC/MCELFObjectWriter.h
View File

@ -49,6 +49,9 @@ public:
const MCFragment &F,
const MCFixup &Fixup,
bool IsPCRel) const;
virtual void adjustFixupOffset(const MCFixup &Fixup,
uint64_t &RelocOffset);
/// @name Accessors
/// @{

79
llvm/lib/MC/ELFObjectWriter.cpp
View File

@ -28,7 +28,6 @@
#include "llvm/ADT/StringSwitch.h"
#include "../Target/Mips/MCTargetDesc/MipsFixupKinds.h"
#include "../Target/PowerPC/MCTargetDesc/PPCFixupKinds.h"
#include <vector>
using namespace llvm;
@ -448,7 +447,8 @@ void ELFObjectWriter::RecordRelocation(const MCAssembler &Asm,
uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) +
Fixup.getOffset();
adjustFixupOffset(Fixup, RelocOffset);
// FIXME: no tests cover this. Is adjustFixupOffset dead code?
TargetObjectWriter->adjustFixupOffset(Fixup, RelocOffset);
if (!hasRelocationAddend())
Addend = 0;
@ -1259,12 +1259,11 @@ MCObjectWriter *llvm::createELFObjectWriter(MCELFObjectTargetWriter *MOTW,
case ELF::EM_386:
case ELF::EM_X86_64:
case ELF::EM_ARM:
case ELF::EM_PPC:
case ELF::EM_PPC64:
return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break;
case ELF::EM_MBLAZE:
return new MBlazeELFObjectWriter(MOTW, OS, IsLittleEndian); break;
case ELF::EM_PPC:
case ELF::EM_PPC64:
return new PPCELFObjectWriter(MOTW, OS, IsLittleEndian); break;
case ELF::EM_MIPS:
return new MipsELFObjectWriter(MOTW, OS, IsLittleEndian); break;
default: llvm_unreachable("Unsupported architecture"); break;
@ -1281,76 +1280,6 @@ unsigned ELFObjectWriter::GetRelocType(const MCValue &Target,
}
/// START OF SUBCLASSES for ELFObjectWriter
//===- PPCELFObjectWriter -------------------------------------------===//
PPCELFObjectWriter::PPCELFObjectWriter(MCELFObjectTargetWriter *MOTW,
raw_ostream &_OS,
bool IsLittleEndian)
: ELFObjectWriter(MOTW, _OS, IsLittleEndian) {
}
PPCELFObjectWriter::~PPCELFObjectWriter() {
}
unsigned PPCELFObjectWriter::GetRelocType(const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel,
bool IsRelocWithSymbol,
int64_t Addend) const {
// determine the type of the relocation
unsigned Type;
if (IsPCRel) {
switch ((unsigned)Fixup.getKind()) {
default:
llvm_unreachable("Unimplemented");
case PPC::fixup_ppc_br24:
Type = ELF::R_PPC_REL24;
break;
case FK_PCRel_4:
Type = ELF::R_PPC_REL32;
break;
}
} else {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
case PPC::fixup_ppc_br24:
Type = ELF::R_PPC_ADDR24;
break;
case PPC::fixup_ppc_brcond14:
Type = ELF::R_PPC_ADDR14_BRTAKEN; // XXX: or BRNTAKEN?_
break;
case PPC::fixup_ppc_ha16:
Type = ELF::R_PPC_ADDR16_HA;
break;
case PPC::fixup_ppc_lo16:
Type = ELF::R_PPC_ADDR16_LO;
break;
case PPC::fixup_ppc_lo14:
Type = ELF::R_PPC_ADDR14;
break;
case FK_Data_4:
Type = ELF::R_PPC_ADDR32;
break;
case FK_Data_2:
Type = ELF::R_PPC_ADDR16;
break;
}
}
return Type;
}
void PPCELFObjectWriter::
adjustFixupOffset(const MCFixup &Fixup, uint64_t &RelocOffset) {
switch ((unsigned)Fixup.getKind()) {
case PPC::fixup_ppc_ha16:
case PPC::fixup_ppc_lo16:
RelocOffset += 2;
break;
default:
break;
}
}
//===- MBlazeELFObjectWriter -------------------------------------------===//
MBlazeELFObjectWriter::MBlazeELFObjectWriter(MCELFObjectTargetWriter *MOTW,

18
llvm/lib/MC/ELFObjectWriter.h
View File

@ -353,24 +353,6 @@ class ELFObjectWriter : public MCObjectWriter {
virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
bool IsPCRel, bool IsRelocWithSymbol,
int64_t Addend) const;
virtual void adjustFixupOffset(const MCFixup &Fixup,
uint64_t &RelocOffset) {}
};
//===- PPCELFObjectWriter -------------------------------------------===//
class PPCELFObjectWriter : public ELFObjectWriter {
public:
PPCELFObjectWriter(MCELFObjectTargetWriter *MOTW,
raw_ostream &_OS,
bool IsLittleEndian);
virtual ~PPCELFObjectWriter();
protected:
virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
bool IsPCRel, bool IsRelocWithSymbol,
int64_t Addend) const;
virtual void adjustFixupOffset(const MCFixup &Fixup, uint64_t &RelocOffset);
};
//===- MBlazeELFObjectWriter -------------------------------------------===//

4
llvm/lib/MC/MCELFObjectTargetWriter.cpp
View File

@ -33,6 +33,10 @@ const MCSymbol *MCELFObjectTargetWriter::ExplicitRelSym(const MCAssembler &Asm,
}
void MCELFObjectTargetWriter::adjustFixupOffset(const MCFixup &Fixup,
uint64_t &RelocOffset) {
}
unsigned MCELFObjectTargetWriter::GetRelocType(const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel,

103
llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp Normal file
View File

@ -0,0 +1,103 @@
//===-- PPCELFObjectWriter.cpp - PPC ELF Writer ---------------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/PPCFixupKinds.h"
#include "MCTargetDesc/PPCMCTargetDesc.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
namespace {
class PPCELFObjectWriter : public MCELFObjectTargetWriter {
public:
PPCELFObjectWriter(bool Is64Bit, uint8_t OSABI);
virtual ~PPCELFObjectWriter();
protected:
virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
bool IsPCRel, bool IsRelocWithSymbol,
int64_t Addend) const;
virtual void adjustFixupOffset(const MCFixup &Fixup, uint64_t &RelocOffset);
};
}
PPCELFObjectWriter::PPCELFObjectWriter(bool Is64Bit, uint8_t OSABI)
: MCELFObjectTargetWriter(Is64Bit, OSABI,
Is64Bit ? ELF::EM_PPC64 : ELF::EM_PPC,
/*HasRelocationAddend*/ false) {}
PPCELFObjectWriter::~PPCELFObjectWriter() {
}
unsigned PPCELFObjectWriter::GetRelocType(const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel,
bool IsRelocWithSymbol,
int64_t Addend) const {
// determine the type of the relocation
unsigned Type;
if (IsPCRel) {
switch ((unsigned)Fixup.getKind()) {
default:
llvm_unreachable("Unimplemented");
case PPC::fixup_ppc_br24:
Type = ELF::R_PPC_REL24;
break;
case FK_PCRel_4:
Type = ELF::R_PPC_REL32;
break;
}
} else {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
case PPC::fixup_ppc_br24:
Type = ELF::R_PPC_ADDR24;
break;
case PPC::fixup_ppc_brcond14:
Type = ELF::R_PPC_ADDR14_BRTAKEN; // XXX: or BRNTAKEN?_
break;
case PPC::fixup_ppc_ha16:
Type = ELF::R_PPC_ADDR16_HA;
break;
case PPC::fixup_ppc_lo16:
Type = ELF::R_PPC_ADDR16_LO;
break;
case PPC::fixup_ppc_lo14:
Type = ELF::R_PPC_ADDR14;
break;
case FK_Data_4:
Type = ELF::R_PPC_ADDR32;
break;
case FK_Data_2:
Type = ELF::R_PPC_ADDR16;
break;
}
}
return Type;
}
void PPCELFObjectWriter::
adjustFixupOffset(const MCFixup &Fixup, uint64_t &RelocOffset) {
switch ((unsigned)Fixup.getKind()) {
case PPC::fixup_ppc_ha16:
case PPC::fixup_ppc_lo16:
RelocOffset += 2;
break;
default:
break;
}
}
MCObjectWriter *llvm::createPPCELFObjectWriter(raw_ostream &OS,
bool Is64Bit,
uint8_t OSABI) {
MCELFObjectTargetWriter *MOTW = new PPCELFObjectWriter(Is64Bit, OSABI);
return createELFObjectWriter(MOTW, OS, /*IsLittleEndian=*/true);
}

8
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
View File

@ -14,14 +14,18 @@
#ifndef PPCMCTARGETDESC_H
#define PPCMCTARGETDESC_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCObjectWriter;
class MCSubtargetInfo;
class Target;
class StringRef;
class raw_ostream;
extern Target ThePPC32Target;
extern Target ThePPC64Target;
@ -32,6 +36,10 @@ MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
MCAsmBackend *createPPCAsmBackend(const Target &T, StringRef TT);
/// createPPCELFObjectWriter - Construct an PPC ELF object writer.
MCObjectWriter *createPPCELFObjectWriter(raw_ostream &OS,
bool Is64Bit,
uint8_t OSABI);
} // End llvm namespace
// Defines symbolic names for PowerPC registers. This defines a mapping from