AArch64: stop trying to use 32-bit MOVZs when expanding patchpoints.

Of course the assembly was right but because the opcode was MOVZWi it was
encoded as "movz w16, #65535, lsl #32" which is an unallocated encoding and
would go horribly wrong on a CPU.

No idea how this bug survived this long. It seems nobody is using that aspect
of patchpoints.

llvm-svn: 272831
This commit is contained in:
Tim Northover 2016-06-15 20:33:36 +00:00
parent b82f08fa3d
commit 389a1e39ea
2 changed files with 13 additions and 6 deletions

View File

@ -404,16 +404,16 @@ void AArch64AsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
EncodedBytes = 16;
// Materialize the jump address:
EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVZWi)
EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVZXi)
.addReg(ScratchReg)
.addImm((CallTarget >> 32) & 0xFFFF)
.addImm(32));
EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVKWi)
EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVKXi)
.addReg(ScratchReg)
.addReg(ScratchReg)
.addImm((CallTarget >> 16) & 0xFFFF)
.addImm(16));
EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVKWi)
EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVKXi)
.addReg(ScratchReg)
.addReg(ScratchReg)
.addImm(CallTarget & 0xFFFF)

View File

@ -1,5 +1,12 @@
; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s
; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s
; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel < %s | FileCheck %s --check-prefix=FAST
; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -filetype=obj -o %t %s
; RUN: llvm-objdump -triple arm64-apple-darwin -d %t | FileCheck %s --check-prefix CHECK-ENCODING
; CHECK-ENCODING-NOT: <unknown>
; CHECK-ENCODING: movz x16, #65535, lsl #32
; CHECK-ENCODING: movk x16, #57005, lsl #16
; CHECK-ENCODING: movk x16, #48879
; One argument will be passed in register, the other will be pushed on the stack.
; Return value in x0.
@ -11,8 +18,8 @@ entry:
; CHECK-NEXT: mov x0, x{{.+}}
; CHECK: Ltmp
; CHECK-NEXT: movz x16, #65535, lsl #32
; CHECK-NEXT: movk x16, #57005, lsl #16
; CHECK-NEXT: movk x16, #48879
; CHECK: movk x16, #57005, lsl #16
; CHECK: movk x16, #48879
; CHECK-NEXT: blr x16
; FAST-LABEL: jscall_patchpoint_codegen:
; FAST: Ltmp