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[InstCombine] generalize reassociated Demorgan folds 

This updates the recent D112108 / b92412fb28
to handle the flipped logic ('or') sibling:
https://alive2.llvm.org/ce/z/Y2L6Ch
This commit is contained in:
Sanjay Patel 2021-10-21 10:37:16 -04:00
parent 6b560a8e23
commit 3888de9507
2 changed files with 36 additions and 28 deletions
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37
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
View File

@ -1521,27 +1521,45 @@ static Instruction *reassociateFCmps(BinaryOperator &BO,
return BinaryOperator::Create(Opcode, NewFCmp, BO11); return BinaryOperator::Create(Opcode, NewFCmp, BO11);
} }
/// Match De Morgan's Laws: /// Match variations of De Morgan's Laws:
/// (~A & ~B) == (~(A | B)) /// (~A & ~B) == (~(A | B))
/// (~A | ~B) == (~(A & B)) /// (~A | ~B) == (~(A & B))
static Instruction *matchDeMorgansLaws(BinaryOperator &I, static Instruction *matchDeMorgansLaws(BinaryOperator &I,
InstCombiner::BuilderTy &Builder) { InstCombiner::BuilderTy &Builder) {
auto Opcode = I.getOpcode(); const Instruction::BinaryOps Opcode = I.getOpcode();
assert((Opcode == Instruction::And || Opcode == Instruction::Or) && assert((Opcode == Instruction::And || Opcode == Instruction::Or) &&
"Trying to match De Morgan's Laws with something other than and/or"); "Trying to match De Morgan's Laws with something other than and/or");
// Flip the logic operation. // Flip the logic operation.
Opcode = (Opcode == Instruction::And) ? Instruction::Or : Instruction::And; const Instruction::BinaryOps FlippedOpcode =
(Opcode == Instruction::And) ? Instruction::Or : Instruction::And;
Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
Value *A, *B; Value *A, *B;
if (match(I.getOperand(0), m_OneUse(m_Not(m_Value(A)))) && if (match(Op0, m_OneUse(m_Not(m_Value(A)))) &&
match(I.getOperand(1), m_OneUse(m_Not(m_Value(B)))) && match(Op1, m_OneUse(m_Not(m_Value(B)))) &&
!InstCombiner::isFreeToInvert(A, A->hasOneUse()) && !InstCombiner::isFreeToInvert(A, A->hasOneUse()) &&
!InstCombiner::isFreeToInvert(B, B->hasOneUse())) { !InstCombiner::isFreeToInvert(B, B->hasOneUse())) {
Value *AndOr = Builder.CreateBinOp(Opcode, A, B, I.getName() + ".demorgan"); Value *AndOr =
Builder.CreateBinOp(FlippedOpcode, A, B, I.getName() + ".demorgan");
return BinaryOperator::CreateNot(AndOr); return BinaryOperator::CreateNot(AndOr);
} }
// The 'not' ops may require reassociation.
// (A & ~B) & ~C --> A & ~(B | C)
// (~B & A) & ~C --> A & ~(B | C)
// (A | ~B) | ~C --> A | ~(B & C)
// (~B | A) | ~C --> A | ~(B & C)
BinaryOperator *BO;
if (match(Op0, m_OneUse(m_BinOp(BO))) && BO->getOpcode() == Opcode) {
Value *C;
if (match(BO, m_c_BinOp(m_Value(A), m_Not(m_Value(B)))) &&
match(Op1, m_Not(m_Value(C)))) {
Value *FlippedBO = Builder.CreateBinOp(FlippedOpcode, B, C);
return BinaryOperator::Create(Opcode, A, Builder.CreateNot(FlippedBO));
}
}
return nullptr; return nullptr;
} }
@ -2012,13 +2030,6 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator &I) {
if (match(Op0, m_c_Xor(m_Not(m_Value(A)), m_Value(B))) && if (match(Op0, m_c_Xor(m_Not(m_Value(A)), m_Value(B))) &&
match(Op1, m_c_Or(m_Specific(A), m_Specific(B)))) match(Op1, m_c_Or(m_Specific(A), m_Specific(B))))
return BinaryOperator::CreateAnd(A, B); return BinaryOperator::CreateAnd(A, B);
// (A & ~B) & ~C -> A & ~(B | C)
// (~B & A) & ~C -> A & ~(B | C)
if (match(Op0, m_OneUse(m_c_And(m_Value(A), m_Not(m_Value(B))))) &&
match(Op1, m_Not(m_Value(C))))
return BinaryOperator::CreateAnd(
A, Builder.CreateNot(Builder.CreateOr(B, C)));
} }
{ {

27
llvm/test/Transforms/InstCombine/and-xor-or.ll
View File

@ -614,10 +614,9 @@ define i32 @not_and_and_not_extra_and1_use(i32 %a0, i32 %b, i32 %c) {
define i32 @not_or_or_not(i32 %a0, i32 %b, i32 %c) { define i32 @not_or_or_not(i32 %a0, i32 %b, i32 %c) {
; CHECK-LABEL: @not_or_or_not( ; CHECK-LABEL: @not_or_or_not(
; CHECK-NEXT: [[A:%.*]] = sdiv i32 42, [[A0:%.*]] ; CHECK-NEXT: [[A:%.*]] = sdiv i32 42, [[A0:%.*]]
; CHECK-NEXT: [[NOT1:%.*]] = xor i32 [[B:%.*]], -1 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: [[NOT2:%.*]] = xor i32 [[C:%.*]], -1 ; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[A]], [[NOT1]] ; CHECK-NEXT: [[OR2:%.*]] = or i32 [[A]], [[TMP2]]
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[OR1]], [[NOT2]]
; CHECK-NEXT: ret i32 [[OR2]] ; CHECK-NEXT: ret i32 [[OR2]]
; ;
%a = sdiv i32 42, %a0 ; thwart complexity-based canonicalization %a = sdiv i32 42, %a0 ; thwart complexity-based canonicalization
@ -631,10 +630,9 @@ define i32 @not_or_or_not(i32 %a0, i32 %b, i32 %c) {
define <2 x i6> @not_or_or_not_2i6(<2 x i6> %a0, <2 x i6> %b, <2 x i6> %c) { define <2 x i6> @not_or_or_not_2i6(<2 x i6> %a0, <2 x i6> %b, <2 x i6> %c) {
; CHECK-LABEL: @not_or_or_not_2i6( ; CHECK-LABEL: @not_or_or_not_2i6(
; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i6> <i6 3, i6 3>, [[A0:%.*]] ; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i6> <i6 3, i6 3>, [[A0:%.*]]
; CHECK-NEXT: [[NOT1:%.*]] = xor <2 x i6> [[B:%.*]], <i6 -1, i6 -1> ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i6> [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: [[NOT2:%.*]] = xor <2 x i6> [[C:%.*]], <i6 -1, i6 undef> ; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i6> [[TMP1]], <i6 -1, i6 -1>
; CHECK-NEXT: [[OR1:%.*]] = or <2 x i6> [[A]], [[NOT1]] ; CHECK-NEXT: [[OR2:%.*]] = or <2 x i6> [[A]], [[TMP2]]
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i6> [[OR1]], [[NOT2]]
; CHECK-NEXT: ret <2 x i6> [[OR2]] ; CHECK-NEXT: ret <2 x i6> [[OR2]]
; ;
%a = sdiv <2 x i6> <i6 3, i6 3>, %a0 ; thwart complexity-based canonicalization %a = sdiv <2 x i6> <i6 3, i6 3>, %a0 ; thwart complexity-based canonicalization
@ -649,10 +647,9 @@ define <2 x i6> @not_or_or_not_2i6(<2 x i6> %a0, <2 x i6> %b, <2 x i6> %c) {
define i32 @not_or_or_not_commute1(i32 %a, i32 %b, i32 %c) { define i32 @not_or_or_not_commute1(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @not_or_or_not_commute1( ; CHECK-LABEL: @not_or_or_not_commute1(
; CHECK-NEXT: [[NOT1:%.*]] = xor i32 [[B:%.*]], -1 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[B:%.*]], [[C:%.*]]
; CHECK-NEXT: [[NOT2:%.*]] = xor i32 [[C:%.*]], -1 ; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[NOT1]], [[A:%.*]] ; CHECK-NEXT: [[OR2:%.*]] = or i32 [[TMP2]], [[A:%.*]]
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[OR1]], [[NOT2]]
; CHECK-NEXT: ret i32 [[OR2]] ; CHECK-NEXT: ret i32 [[OR2]]
; ;
%not1 = xor i32 %b, -1 %not1 = xor i32 %b, -1
@ -667,10 +664,10 @@ define i32 @not_or_or_not_commute1(i32 %a, i32 %b, i32 %c) {
define i32 @not_or_or_not_commute2_extra_not_use(i32 %a0, i32 %b, i32 %c) { define i32 @not_or_or_not_commute2_extra_not_use(i32 %a0, i32 %b, i32 %c) {
; CHECK-LABEL: @not_or_or_not_commute2_extra_not_use( ; CHECK-LABEL: @not_or_or_not_commute2_extra_not_use(
; CHECK-NEXT: [[A:%.*]] = sdiv i32 42, [[A0:%.*]] ; CHECK-NEXT: [[A:%.*]] = sdiv i32 42, [[A0:%.*]]
; CHECK-NEXT: [[NOT1:%.*]] = xor i32 [[B:%.*]], -1
; CHECK-NEXT: [[NOT2:%.*]] = xor i32 [[C:%.*]], -1 ; CHECK-NEXT: [[NOT2:%.*]] = xor i32 [[C:%.*]], -1
; CHECK-NEXT: [[OR1:%.*]] = or i32 [[A]], [[NOT1]] ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[B:%.*]], [[C]]
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[OR1]], [[NOT2]] ; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[A]], [[TMP2]]
; CHECK-NEXT: call void @use(i32 [[NOT2]]) ; CHECK-NEXT: call void @use(i32 [[NOT2]])
; CHECK-NEXT: ret i32 [[OR2]] ; CHECK-NEXT: ret i32 [[OR2]]
; ;