forked from OSchip/llvm-project
AMDGPU/R600: Enable Load combine
Fix and improve tests Differential Revision: https://reviews.llvm.org/D23899 llvm-svn: 279925
This commit is contained in:
Jan Vesely
parent
6943aa306e
commit
38814fa2fd
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@ -198,6 +198,7 @@ R600TargetLowering::R600TargetLowering(const TargetMachine &TM,
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setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
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setTargetDAGCombine(ISD::SELECT_CC);
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setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
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setTargetDAGCombine(ISD::LOAD);
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}
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const R600Subtarget *R600TargetLowering::getSubtarget() const {
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@ -7,7 +7,7 @@
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; GCN-NOHSA: buffer_load_ushort v{{[0-9]+}}
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; GCN-HSA: flat_load_ushort
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; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
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; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
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define void @constant_load_i16(i16 addrspace(1)* %out, i16 addrspace(2)* %in) {
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entry:
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%ld = load i16, i16 addrspace(2)* %in
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@ -18,7 +18,7 @@ entry:
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; FUNC-LABEL: {{^}}constant_load_v2i16:
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; GCN: s_load_dword s
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; EG: VTX_READ_32
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; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
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define void @constant_load_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <2 x i16>, <2 x i16> addrspace(2)* %in
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@ -29,8 +29,8 @@ entry:
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; FUNC-LABEL: {{^}}constant_load_v3i16:
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; GCN: s_load_dwordx2 s
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; EG-DAG: VTX_READ_32
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; EG-DAG: VTX_READ_16
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; EG-DAG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
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; EG-DAG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 4, #1
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define void @constant_load_v3i16(<3 x i16> addrspace(1)* %out, <3 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <3 x i16>, <3 x i16> addrspace(2)* %in
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@ -41,7 +41,7 @@ entry:
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; FUNC-LABEL: {{^}}constant_load_v4i16:
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; GCN: s_load_dwordx2
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; EG: VTX_READ_64
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; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
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define void @constant_load_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <4 x i16>, <4 x i16> addrspace(2)* %in
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@ -52,7 +52,7 @@ entry:
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; FUNC-LABEL: {{^}}constant_load_v8i16:
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; GCN: s_load_dwordx4
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; EG: VTX_READ_128
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; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
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define void @constant_load_v8i16(<8 x i16> addrspace(1)* %out, <8 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <8 x i16>, <8 x i16> addrspace(2)* %in
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@ -63,8 +63,8 @@ entry:
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; FUNC-LABEL: {{^}}constant_load_v16i16:
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; GCN: s_load_dwordx8
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; EG: VTX_READ_128
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; EG: VTX_READ_128
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; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
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; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
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define void @constant_load_v16i16(<16 x i16> addrspace(1)* %out, <16 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <16 x i16>, <16 x i16> addrspace(2)* %in
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@ -79,7 +79,7 @@ entry:
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; GCN-HSA: flat_load_ushort
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; GCN-HSA: flat_store_dword
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; EG: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
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; EG: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}, 0, #1
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define void @constant_zextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(2)* %in) #0 {
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%a = load i16, i16 addrspace(2)* %in
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%ext = zext i16 %a to i32
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@ -94,7 +94,7 @@ define void @constant_zextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(
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; GCN-HSA: flat_load_sshort
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; GCN-HSA: flat_store_dword
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; EG: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]]
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; EG: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
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; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
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; EG: 16
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define void @constant_sextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(2)* %in) #0 {
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@ -107,6 +107,8 @@ define void @constant_sextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(
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; FUNC-LABEL: {{^}}constant_zextload_v1i16_to_v1i32:
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; GCN-NOHSA: buffer_load_ushort
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; GCN-HSA: flat_load_ushort
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; EG: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}, 0, #1
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define void @constant_zextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i16> addrspace(2)* %in) #0 {
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%load = load <1 x i16>, <1 x i16> addrspace(2)* %in
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%ext = zext <1 x i16> %load to <1 x i32>
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@ -117,6 +119,10 @@ define void @constant_zextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x
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; FUNC-LABEL: {{^}}constant_sextload_v1i16_to_v1i32:
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; GCN-NOHSA: buffer_load_sshort
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; GCN-HSA: flat_load_sshort
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; EG: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
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; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
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; EG: 16
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define void @constant_sextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i16> addrspace(2)* %in) #0 {
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%load = load <1 x i16>, <1 x i16> addrspace(2)* %in
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%ext = sext <1 x i16> %load to <1 x i32>
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@ -128,6 +134,12 @@ define void @constant_sextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x
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; GCN: s_load_dword s
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; GCN-DAG: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0xffff{{$}}
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; GCN-DAG: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
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; v2i16 is naturally 4 byte aligned
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; EG: VTX_READ_32 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
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; TODO: This should use DST, but for some there are redundant MOVs
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; EG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, literal
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; EG: 16
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define void @constant_zextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(2)* %in) #0 {
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%load = load <2 x i16>, <2 x i16> addrspace(2)* %in
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%ext = zext <2 x i16> %load to <2 x i32>
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@ -140,10 +152,12 @@ define void @constant_zextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x
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; GCN-DAG: s_ashr_i32
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; GCN-DAG: s_sext_i32_i16
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; EG-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
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; EG-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
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; v2i16 is naturally 4 byte aligned
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; EG: VTX_READ_32 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
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; TODO: These should use DST, but for some there are redundant MOVs
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; TODO: We should also use ASHR instead of LSHR + BFE
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, 0.0, literal
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; EG-DAG: 16
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; EG-DAG: 16
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define void @constant_sextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(2)* %in) #0 {
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@ -155,6 +169,13 @@ define void @constant_sextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x
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; FUNC-LABEL: {{^}}constant_constant_zextload_v3i16_to_v3i32:
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; GCN: s_load_dwordx2
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; v3i16 is naturally 8 byte aligned
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; EG-DAG: VTX_READ_32 [[DST_HI:T[0-9]\.[XYZW]]], [[DST_HI]], 0, #1
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; EG-DAG: VTX_READ_16 [[DST_LO:T[0-9]\.[XYZW]]], [[DST_LO]], 4, #1
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; TODO: This should use DST, but for some there are redundant MOVs
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; EG: LSHR {{[* ]*}}{{T[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, literal
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; EG: 16
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define void @constant_constant_zextload_v3i16_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <3 x i16>, <3 x i16> addrspace(2)* %in
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@ -165,6 +186,16 @@ entry:
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; FUNC-LABEL: {{^}}constant_constant_sextload_v3i16_to_v3i32:
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; GCN: s_load_dwordx2
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; v3i16 is naturally 8 byte aligned
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; EG-DAG: VTX_READ_32 [[DST_HI:T[0-9]\.[XYZW]]], [[DST_HI]], 0, #1
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; EG-DAG: VTX_READ_16 [[DST_LO:T[0-9]\.[XYZW]]], [[DST_LO]], 4, #1
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; TODO: These should use DST, but for some there are redundant MOVs
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; EG-DAG: ASHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, 0.0, literal
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; EG-DAG: 16
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; EG-DAG: 16
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define void @constant_constant_sextload_v3i16_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i16> addrspace(2)* %in) {
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entry:
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%ld = load <3 x i16>, <3 x i16> addrspace(2)* %in
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@ -178,10 +209,13 @@ entry:
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; GCN-DAG: s_and_b32
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; GCN-DAG: s_lshr_b32
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; EG: VTX_READ_16
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; EG: VTX_READ_16
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; EG: VTX_READ_16
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; EG: VTX_READ_16
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; v4i16 is naturally 8 byte aligned
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; EG: VTX_READ_64 [[DST:T[0-9]\.XY]], {{T[0-9].[XYZW]}}, 0, #1
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; TODO: These should use DST, but for some there are redundant MOVs
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, literal
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; EG-DAG: 16
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; EG-DAG: 16
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define void @constant_constant_zextload_v4i16_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(2)* %in) #0 {
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%load = load <4 x i16>, <4 x i16> addrspace(2)* %in
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%ext = zext <4 x i16> %load to <4 x i32>
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@ -194,14 +228,14 @@ define void @constant_constant_zextload_v4i16_to_v4i32(<4 x i32> addrspace(1)* %
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; GCN-DAG: s_ashr_i32
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; GCN-DAG: s_sext_i32_i16
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; EG-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
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; EG-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
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; EG-DAG: VTX_READ_16 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]]
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; EG-DAG: VTX_READ_16 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]]
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Z]], 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_W]], 0.0, literal
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; v4i16 is naturally 8 byte aligned
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; EG: VTX_READ_64 [[DST:T[0-9]\.XY]], {{T[0-9].[XYZW]}}, 0, #1
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; TODO: These should use DST, but for some there are redundant MOVs
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; TODO: We should use ASHR instead of LSHR + BFE
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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@ -217,6 +251,26 @@ define void @constant_sextload_v4i16_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x
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; GCN: s_load_dwordx4
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; GCN-DAG: s_and_b32
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; GCN-DAG: s_lshr_b32
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; v8i16 is naturally 16 byte aligned
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; EG: VTX_READ_128 [[DST:T[0-9]\.XYZW]], {{T[0-9].[XYZW]}}, 0, #1
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; TODO: These should use DST, but for some there are redundant MOVs
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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define void @constant_zextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i16> addrspace(2)* %in) #0 {
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%load = load <8 x i16>, <8 x i16> addrspace(2)* %in
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%ext = zext <8 x i16> %load to <8 x i32>
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@ -228,6 +282,27 @@ define void @constant_zextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x
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; GCN: s_load_dwordx4
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; GCN-DAG: s_ashr_i32
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; GCN-DAG: s_sext_i32_i16
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; v8i16 is naturally 16 byte aligned
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; EG: VTX_READ_128 [[DST:T[0-9]\.XYZW]], {{T[0-9].[XYZW]}}, 0, #1
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; TODO: These should use DST, but for some there are redundant MOVs
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; TODO: We should use ASHR instead of LSHR + BFE
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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; EG-DAG: 16
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define void @constant_sextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i16> addrspace(2)* %in) #0 {
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%load = load <8 x i16>, <8 x i16> addrspace(2)* %in
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%ext = sext <8 x i16> %load to <8 x i32>
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@ -239,6 +314,10 @@ define void @constant_sextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x
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; GCN: s_load_dwordx8
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; GCN-DAG: s_and_b32
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; GCN-DAG: s_lshr_b32
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||||
|
||||
; v16i16 is naturally 32 byte aligned
|
||||
; EG-DAG: VTX_READ_128 [[DST_HI:T[0-9]+\.XYZW]], {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 [[DST_LO:T[0-9]+\.XYZW]], {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
define void @constant_zextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(2)* %in
|
||||
%ext = zext <16 x i16> %load to <16 x i32>
|
||||
|
|
@ -250,6 +329,10 @@ define void @constant_zextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <
|
|||
; GCN: s_load_dwordx8
|
||||
; GCN-DAG: s_ashr_i32
|
||||
; GCN-DAG: s_sext_i32_i16
|
||||
|
||||
; v16i16 is naturally 32 byte aligned
|
||||
; EG-DAG: VTX_READ_128 [[DST_HI:T[0-9]+\.XYZW]], {{T[0-9]+\.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 [[DST_LO:T[0-9]+\.XYZW]], {{T[0-9]+\.[XYZW]}}, 16, #1
|
||||
define void @constant_sextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(2)* %in
|
||||
%ext = sext <16 x i16> %load to <16 x i32>
|
||||
|
|
@ -262,6 +345,11 @@ define void @constant_sextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <
|
|||
; GCN-DAG: s_mov_b32 [[K:s[0-9]+]], 0xffff{{$}}
|
||||
; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[K]]
|
||||
; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 48, #1
|
||||
define void @constant_zextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(2)* %in
|
||||
%ext = zext <32 x i16> %load to <32 x i32>
|
||||
|
|
@ -273,6 +361,11 @@ define void @constant_zextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <
|
|||
; GCN: s_load_dwordx16
|
||||
; GCN-DAG: s_ashr_i32
|
||||
; GCN-DAG: s_sext_i32_i16
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 48, #1
|
||||
define void @constant_sextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(2)* %in
|
||||
%ext = sext <32 x i16> %load to <32 x i32>
|
||||
|
|
@ -283,6 +376,15 @@ define void @constant_sextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <
|
|||
; FUNC-LABEL: {{^}}constant_zextload_v64i16_to_v64i32:
|
||||
; GCN: s_load_dwordx16
|
||||
; GCN: s_load_dwordx16
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 48, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 64, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 80, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 96, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 112, #1
|
||||
define void @constant_zextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <64 x i16>, <64 x i16> addrspace(2)* %in
|
||||
%ext = zext <64 x i16> %load to <64 x i32>
|
||||
|
|
@ -291,6 +393,15 @@ define void @constant_zextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v64i16_to_v64i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 48, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 64, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 80, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 96, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+\.[XYZW]}}, 112, #1
|
||||
define void @constant_sextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <64 x i16>, <64 x i16> addrspace(2)* %in
|
||||
%ext = sext <64 x i16> %load to <64 x i32>
|
||||
|
|
@ -305,6 +416,9 @@ define void @constant_sextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <
|
|||
|
||||
; GCN-NOHSA: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]]
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @constant_zextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(2)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(2)* %in
|
||||
%ext = zext i16 %a to i64
|
||||
|
|
@ -319,6 +433,11 @@ define void @constant_zextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(
|
|||
|
||||
; GCN-NOHSA: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]]
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 15 ?
|
||||
; EG: 31
|
||||
define void @constant_sextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(2)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(2)* %in
|
||||
%ext = sext i16 %a to i64
|
||||
|
|
@ -327,6 +446,9 @@ define void @constant_sextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v1i16_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @constant_zextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(2)* %in
|
||||
%ext = zext <1 x i16> %load to <1 x i64>
|
||||
|
|
@ -335,6 +457,11 @@ define void @constant_zextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v1i16_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 15 ?
|
||||
; EG: 31
|
||||
define void @constant_sextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(2)* %in
|
||||
%ext = sext <1 x i16> %load to <1 x i64>
|
||||
|
|
@ -343,6 +470,8 @@ define void @constant_sextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v2i16_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(2)* %in
|
||||
%ext = zext <2 x i16> %load to <2 x i64>
|
||||
|
|
@ -351,6 +480,8 @@ define void @constant_zextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v2i16_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(2)* %in
|
||||
%ext = sext <2 x i16> %load to <2 x i64>
|
||||
|
|
@ -359,6 +490,8 @@ define void @constant_sextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v4i16_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(2)* %in
|
||||
%ext = zext <4 x i16> %load to <4 x i64>
|
||||
|
|
@ -367,6 +500,8 @@ define void @constant_zextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v4i16_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(2)* %in
|
||||
%ext = sext <4 x i16> %load to <4 x i64>
|
||||
|
|
@ -375,6 +510,8 @@ define void @constant_sextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v8i16_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(2)* %in
|
||||
%ext = zext <8 x i16> %load to <8 x i64>
|
||||
|
|
@ -383,6 +520,8 @@ define void @constant_zextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v8i16_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(2)* %in
|
||||
%ext = sext <8 x i16> %load to <8 x i64>
|
||||
|
|
@ -391,6 +530,9 @@ define void @constant_sextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v16i16_to_v16i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @constant_zextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(2)* %in
|
||||
%ext = zext <16 x i16> %load to <16 x i64>
|
||||
|
|
@ -399,6 +541,9 @@ define void @constant_zextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v16i16_to_v16i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @constant_sextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(2)* %in
|
||||
%ext = sext <16 x i16> %load to <16 x i64>
|
||||
|
|
@ -407,6 +552,11 @@ define void @constant_sextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v32i16_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 48, #1
|
||||
define void @constant_zextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(2)* %in
|
||||
%ext = zext <32 x i16> %load to <32 x i64>
|
||||
|
|
@ -415,6 +565,11 @@ define void @constant_zextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v32i16_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 48, #1
|
||||
define void @constant_sextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i16> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(2)* %in
|
||||
%ext = sext <32 x i16> %load to <32 x i64>
|
||||
|
|
@ -422,6 +577,8 @@ define void @constant_sextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <
|
|||
ret void
|
||||
}
|
||||
|
||||
; These trigger undefined register machine verifier errors
|
||||
|
||||
; ; XFUNC-LABEL: {{^}}constant_zextload_v64i16_to_v64i64:
|
||||
; define void @constant_zextload_v64i16_to_v64i64(<64 x i64> addrspace(1)* %out, <64 x i16> addrspace(2)* %in) #0 {
|
||||
; %load = load <64 x i16>, <64 x i16> addrspace(2)* %in
|
||||
|
|
|
|||
|
|
@ -8,7 +8,8 @@
|
|||
; GCN-NOHSA: buffer_load_ubyte v{{[0-9]+}}
|
||||
; GCN-HSA: flat_load_ubyte
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: NOT AND
|
||||
define void @constant_load_i8(i8 addrspace(1)* %out, i8 addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load i8, i8 addrspace(2)* %in
|
||||
|
|
@ -20,7 +21,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_ushort v
|
||||
; GCN-HSA: flat_load_ushort v
|
||||
|
||||
; EG: VTX_READ_16
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_load_v2i8(<2 x i8> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <2 x i8>, <2 x i8> addrspace(2)* %in
|
||||
|
|
@ -31,7 +32,7 @@ entry:
|
|||
; FUNC-LABEL: {{^}}constant_load_v3i8:
|
||||
; GCN: s_load_dword s
|
||||
|
||||
; EG-DAG: VTX_READ_32
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_load_v3i8(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(2)* %in
|
||||
|
|
@ -42,7 +43,7 @@ entry:
|
|||
; FUNC-LABEL: {{^}}constant_load_v4i8:
|
||||
; GCN: s_load_dword s
|
||||
|
||||
; EG: VTX_READ_32
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_load_v4i8(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <4 x i8>, <4 x i8> addrspace(2)* %in
|
||||
|
|
@ -53,7 +54,7 @@ entry:
|
|||
; FUNC-LABEL: {{^}}constant_load_v8i8:
|
||||
; GCN: s_load_dwordx2
|
||||
|
||||
; EG: VTX_READ_64
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_load_v8i8(<8 x i8> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
|
|
@ -64,7 +65,7 @@ entry:
|
|||
; FUNC-LABEL: {{^}}constant_load_v16i8:
|
||||
; GCN: s_load_dwordx4
|
||||
|
||||
; EG: VTX_READ_128
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_load_v16i8(<16 x i8> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
|
|
@ -76,7 +77,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_ubyte v{{[0-9]+}},
|
||||
; GCN-HSA: flat_load_ubyte
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(2)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(2)* %in
|
||||
%ext = zext i8 %a to i32
|
||||
|
|
@ -88,7 +89,7 @@ define void @constant_zextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(2)
|
|||
; GCN-NOHSA: buffer_load_sbyte
|
||||
; GCN-HSA: flat_load_sbyte
|
||||
|
||||
; EG: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]]
|
||||
; EG: VTX_READ_8 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
|
||||
; EG: 8
|
||||
define void @constant_sextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(2)* %in) #0 {
|
||||
|
|
@ -99,6 +100,8 @@ define void @constant_sextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(2)
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v1i8_to_v1i32:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(2)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i32>
|
||||
|
|
@ -107,6 +110,10 @@ define void @constant_zextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v1i8_to_v1i32:
|
||||
|
||||
; EG: VTX_READ_8 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
|
||||
; EG: 8
|
||||
define void @constant_sextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(2)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i32>
|
||||
|
|
@ -117,8 +124,11 @@ define void @constant_sextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x
|
|||
; FUNC-LABEL: {{^}}constant_zextload_v2i8_to_v2i32:
|
||||
; GCN-NOHSA: buffer_load_ushort
|
||||
; GCN-HSA: flat_load_ushort
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: This should use DST, but for some there are redundant MOVs
|
||||
; EG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG: 8
|
||||
define void @constant_zextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(2)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i32>
|
||||
|
|
@ -134,10 +144,10 @@ define void @constant_zextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x
|
|||
; GCN: v_bfe_i32
|
||||
; GCN: v_bfe_i32
|
||||
|
||||
; EG-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
|
||||
; EG: VTX_READ_16 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_sextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
|
|
@ -153,6 +163,13 @@ define void @constant_sextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x
|
|||
; GCN-DAG: s_bfe_u32
|
||||
; GCN-DAG: s_bfe_u32
|
||||
; GCN-DAG: s_and_b32
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_zextload_v3i8_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(2)* %in
|
||||
|
|
@ -167,6 +184,15 @@ entry:
|
|||
; GCN-DAG: s_bfe_i32
|
||||
; GCN-DAG: s_bfe_i32
|
||||
; GCN-DAG: s_bfe_i32
|
||||
|
||||
; EG: VTX_READ_32 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_sextload_v3i8_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i8> addrspace(2)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(2)* %in
|
||||
|
|
@ -180,10 +206,14 @@ entry:
|
|||
; GCN-DAG: s_and_b32
|
||||
; GCN-DAG: s_lshr_b32
|
||||
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_zextload_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(2)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i32>
|
||||
|
|
@ -196,14 +226,12 @@ define void @constant_zextload_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x
|
|||
; GCN-DAG: s_sext_i32_i8
|
||||
; GCN-DAG: s_ashr_i32
|
||||
|
||||
; EG-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]]
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Z]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_W]], 0.0, literal
|
||||
; EG: VTX_READ_32 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
|
|
@ -219,6 +247,23 @@ define void @constant_sextload_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x
|
|||
; GCN: s_load_dwordx2
|
||||
; GCN-DAG: s_and_b32
|
||||
; GCN-DAG: s_lshr_b32
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_zextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i32>
|
||||
|
|
@ -230,6 +275,25 @@ define void @constant_zextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x
|
|||
; GCN: s_load_dwordx2
|
||||
; GCN-DAG: s_ashr_i32
|
||||
; GCN-DAG: s_sext_i32_i8
|
||||
|
||||
; EG: VTX_READ_64 [[DST:T[0-9]+\.XY]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_sextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i32>
|
||||
|
|
@ -238,6 +302,39 @@ define void @constant_sextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v16i8_to_v16i32:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_zextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i32>
|
||||
|
|
@ -246,6 +343,41 @@ define void @constant_zextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v16i8_to_v16i32:
|
||||
|
||||
; EG: VTX_READ_128 [[DST:T[0-9]+\.XYZW]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_sextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i32>
|
||||
|
|
@ -254,6 +386,70 @@ define void @constant_sextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v32i8_to_v32i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_zextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(2)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i32>
|
||||
|
|
@ -262,6 +458,74 @@ define void @constant_zextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <3
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v32i8_to_v32i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 [[DST_LO:T[0-9]+\.XYZW]], T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 [[DST_HI:T[0-9]+\.XYZW]], T{{[0-9]+}}.X, 16, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @constant_sextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(2)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i32>
|
||||
|
|
@ -270,6 +534,11 @@ define void @constant_sextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <3
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v64i8_to_v64i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 48, #1
|
||||
define void @constant_zextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <64 x i8>, <64 x i8> addrspace(2)* %in
|
||||
%ext = zext <64 x i8> %load to <64 x i32>
|
||||
|
|
@ -278,6 +547,11 @@ define void @constant_zextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <6
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v64i8_to_v64i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 48, #1
|
||||
define void @constant_sextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <64 x i8>, <64 x i8> addrspace(2)* %in
|
||||
%ext = sext <64 x i8> %load to <64 x i32>
|
||||
|
|
@ -293,6 +567,9 @@ define void @constant_sextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <6
|
|||
|
||||
; GCN-HSA-DAG: flat_load_ubyte v[[LO:[0-9]+]],
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]]
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @constant_zextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(2)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(2)* %in
|
||||
%ext = zext i8 %a to i64
|
||||
|
|
@ -307,6 +584,11 @@ define void @constant_zextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(2)
|
|||
|
||||
; GCN-NOHSA: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 7 ?
|
||||
; EG: 31
|
||||
define void @constant_sextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(2)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(2)* %in
|
||||
%ext = sext i8 %a to i64
|
||||
|
|
@ -315,6 +597,9 @@ define void @constant_sextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(2)
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v1i8_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @constant_zextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(2)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i64>
|
||||
|
|
@ -323,6 +608,11 @@ define void @constant_zextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v1i8_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 7 ?
|
||||
; EG: 31
|
||||
define void @constant_sextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(2)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i64>
|
||||
|
|
@ -331,6 +621,8 @@ define void @constant_sextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v2i8_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(2)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i64>
|
||||
|
|
@ -339,6 +631,8 @@ define void @constant_zextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v2i8_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(2)* %in
|
||||
%ext = sext <2 x i8> %load to <2 x i64>
|
||||
|
|
@ -347,6 +641,8 @@ define void @constant_sextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v4i8_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(2)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i64>
|
||||
|
|
@ -355,6 +651,8 @@ define void @constant_zextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v4i8_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(2)* %in
|
||||
%ext = sext <4 x i8> %load to <4 x i64>
|
||||
|
|
@ -363,6 +661,8 @@ define void @constant_sextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v8i8_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i64>
|
||||
|
|
@ -371,6 +671,8 @@ define void @constant_zextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v8i8_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i64>
|
||||
|
|
@ -379,6 +681,8 @@ define void @constant_sextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v16i8_to_v16i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i64>
|
||||
|
|
@ -387,6 +691,8 @@ define void @constant_zextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v16i8_to_v16i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i64>
|
||||
|
|
@ -395,6 +701,9 @@ define void @constant_sextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v32i8_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @constant_zextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(2)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i64>
|
||||
|
|
@ -403,6 +712,9 @@ define void @constant_zextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <3
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v32i8_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @constant_sextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(2)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i64>
|
||||
|
|
@ -445,6 +757,8 @@ define void @constant_zextload_i8_to_i16(i16 addrspace(1)* %out, i8 addrspace(2)
|
|||
|
||||
; GCN-NOHSA: buffer_store_short v[[VAL]]
|
||||
; GCN-HSA: flat_store_short v{{\[[0-9]+:[0-9]+\]}}, v[[VAL]]
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_sextload_i8_to_i16(i16 addrspace(1)* %out, i8 addrspace(2)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(2)* %in
|
||||
%ext = sext i8 %a to i16
|
||||
|
|
@ -461,6 +775,9 @@ define void @constant_zextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v1i8_to_v1i16:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @constant_sextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(2)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i16>
|
||||
|
|
@ -469,6 +786,8 @@ define void @constant_sextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v2i8_to_v2i16:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(2)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i16>
|
||||
|
|
@ -477,6 +796,10 @@ define void @constant_zextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v2i8_to_v2i16:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @constant_sextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(2)* %in
|
||||
%ext = sext <2 x i8> %load to <2 x i16>
|
||||
|
|
@ -485,6 +808,8 @@ define void @constant_sextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v4i8_to_v4i16:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(2)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i16>
|
||||
|
|
@ -493,6 +818,12 @@ define void @constant_zextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v4i8_to_v4i16:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @constant_sextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(2)* %in
|
||||
%ext = sext <4 x i8> %load to <4 x i16>
|
||||
|
|
@ -501,6 +832,8 @@ define void @constant_sextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v8i8_to_v8i16:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i16>
|
||||
|
|
@ -509,6 +842,17 @@ define void @constant_zextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v8i8_to_v8i16:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
|
||||
define void @constant_sextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(2)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i16>
|
||||
|
|
@ -517,6 +861,8 @@ define void @constant_sextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v16i8_to_v16i16:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @constant_zextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i16>
|
||||
|
|
@ -525,6 +871,24 @@ define void @constant_zextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v16i8_to_v16i16:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @constant_sextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <16 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(2)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i16>
|
||||
|
|
@ -533,6 +897,9 @@ define void @constant_sextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_zextload_v32i8_to_v32i16:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @constant_zextload_v32i8_to_v32i16(<32 x i16> addrspace(1)* %out, <32 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(2)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i16>
|
||||
|
|
@ -541,6 +908,41 @@ define void @constant_zextload_v32i8_to_v32i16(<32 x i16> addrspace(1)* %out, <3
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}constant_sextload_v32i8_to_v32i16:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @constant_sextload_v32i8_to_v32i16(<32 x i16> addrspace(1)* %out, <32 x i8> addrspace(2)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(2)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i16>
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
; GCN-NOHSA: buffer_load_ushort v{{[0-9]+}}
|
||||
; GCN-HSA: flat_load_ushort
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load i16, i16 addrspace(1)* %in
|
||||
|
|
@ -22,7 +22,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dword v
|
||||
; GCN-HSA: flat_load_dword v
|
||||
|
||||
; EG: VTX_READ_32
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <2 x i16>, <2 x i16> addrspace(1)* %in
|
||||
|
|
@ -34,8 +34,8 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dwordx2 v
|
||||
; GCN-HSA: flat_load_dwordx2 v
|
||||
|
||||
; EG-DAG: VTX_READ_32
|
||||
; EG-DAG: VTX_READ_16
|
||||
; EG-DAG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 4, #1
|
||||
define void @global_load_v3i16(<3 x i16> addrspace(1)* %out, <3 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <3 x i16>, <3 x i16> addrspace(1)* %in
|
||||
|
|
@ -47,7 +47,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dwordx2
|
||||
; GCN-HSA: flat_load_dwordx2
|
||||
|
||||
; EG: VTX_READ_64
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <4 x i16>, <4 x i16> addrspace(1)* %in
|
||||
|
|
@ -59,7 +59,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG: VTX_READ_128
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v8i16(<8 x i16> addrspace(1)* %out, <8 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <8 x i16>, <8 x i16> addrspace(1)* %in
|
||||
|
|
@ -74,8 +74,8 @@ entry:
|
|||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG: VTX_READ_128
|
||||
; EG: VTX_READ_128
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @global_load_v16i16(<16 x i16> addrspace(1)* %out, <16 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <16 x i16>, <16 x i16> addrspace(1)* %in
|
||||
|
|
@ -90,7 +90,7 @@ entry:
|
|||
; GCN-HSA: flat_load_ushort
|
||||
; GCN-HSA: flat_store_dword
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(1)* %in
|
||||
%ext = zext i16 %a to i32
|
||||
|
|
@ -105,7 +105,7 @@ define void @global_zextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)
|
|||
; GCN-HSA: flat_load_sshort
|
||||
; GCN-HSA: flat_store_dword
|
||||
|
||||
; EG: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]]
|
||||
; EG: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], T{{[0-9]+}}.X, 0, #1
|
||||
; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
|
||||
; EG: 16
|
||||
define void @global_sextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in) #0 {
|
||||
|
|
@ -118,6 +118,8 @@ define void @global_sextload_i16_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)
|
|||
; FUNC-LABEL: {{^}}global_zextload_v1i16_to_v1i32:
|
||||
; GCN-NOHSA: buffer_load_ushort
|
||||
; GCN-HSA: flat_load_ushort
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(1)* %in
|
||||
%ext = zext <1 x i16> %load to <1 x i32>
|
||||
|
|
@ -128,6 +130,10 @@ define void @global_zextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i
|
|||
; FUNC-LABEL: {{^}}global_sextload_v1i16_to_v1i32:
|
||||
; GCN-NOHSA: buffer_load_sshort
|
||||
; GCN-HSA: flat_load_sshort
|
||||
|
||||
; EG: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], T{{[0-9]+}}.X, 0, #1
|
||||
; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
|
||||
; EG: 16
|
||||
define void @global_sextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(1)* %in
|
||||
%ext = sext <1 x i16> %load to <1 x i32>
|
||||
|
|
@ -138,6 +144,11 @@ define void @global_sextload_v1i16_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i
|
|||
; FUNC-LABEL: {{^}}global_zextload_v2i16_to_v2i32:
|
||||
; GCN-NOHSA: buffer_load_dword
|
||||
; GCN-HSA: flat_load_dword
|
||||
|
||||
; EG: VTX_READ_32 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
|
||||
; TODO: This should use DST, but for some there are redundant MOVs
|
||||
; EG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, literal
|
||||
; EG: 16
|
||||
define void @global_zextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(1)* %in
|
||||
%ext = zext <2 x i16> %load to <2 x i32>
|
||||
|
|
@ -150,10 +161,11 @@ define void @global_zextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i
|
|||
|
||||
; GCN-HSA: flat_load_dword
|
||||
|
||||
; EG-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
|
||||
; EG-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
|
||||
; EG: VTX_READ_32 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; TODO: We should also use ASHR instead of LSHR + BFE
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, 0.0, literal
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
define void @global_sextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 {
|
||||
|
|
@ -166,6 +178,12 @@ define void @global_sextload_v2i16_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i
|
|||
; FUNC-LABEL: {{^}}global_global_zextload_v3i16_to_v3i32:
|
||||
; GCN-NOHSA: buffer_load_dwordx2
|
||||
; GCN-HSA: flat_load_dwordx2
|
||||
|
||||
; EG-DAG: VTX_READ_32 [[DST_HI:T[0-9]\.[XYZW]]], [[DST_HI]], 0, #1
|
||||
; EG-DAG: VTX_READ_16 [[DST_LO:T[0-9]\.[XYZW]]], [[DST_LO]], 4, #1
|
||||
; TODO: This should use DST, but for some there are redundant MOVs
|
||||
; EG: LSHR {{[* ]*}}{{T[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, literal
|
||||
; EG: 16
|
||||
define void @global_global_zextload_v3i16_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <3 x i16>, <3 x i16> addrspace(1)* %in
|
||||
|
|
@ -177,6 +195,15 @@ entry:
|
|||
; FUNC-LABEL: {{^}}global_global_sextload_v3i16_to_v3i32:
|
||||
; GCN-NOHSA: buffer_load_dwordx2
|
||||
; GCN-HSA: flat_load_dwordx2
|
||||
|
||||
; EG-DAG: VTX_READ_32 [[DST_HI:T[0-9]\.[XYZW]]], [[DST_HI]], 0, #1
|
||||
; EG-DAG: VTX_READ_16 [[DST_LO:T[0-9]\.[XYZW]]], [[DST_LO]], 4, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: ASHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, 0.0, literal
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
define void @global_global_sextload_v3i16_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i16> addrspace(1)* %in) {
|
||||
entry:
|
||||
%ld = load <3 x i16>, <3 x i16> addrspace(1)* %in
|
||||
|
|
@ -190,10 +217,12 @@ entry:
|
|||
|
||||
; GCN-HSA: flat_load_dwordx2
|
||||
|
||||
; EG: VTX_READ_16
|
||||
; EG: VTX_READ_16
|
||||
; EG: VTX_READ_16
|
||||
; EG: VTX_READ_16
|
||||
; EG: VTX_READ_64 [[DST:T[0-9]\.XY]], {{T[0-9].[XYZW]}}, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{PV.[XYZW]}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{T[0-9].[XYZW]}}, literal
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
define void @global_global_zextload_v4i16_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(1)* %in
|
||||
%ext = zext <4 x i16> %load to <4 x i32>
|
||||
|
|
@ -206,14 +235,13 @@ define void @global_global_zextload_v4i16_to_v4i32(<4 x i32> addrspace(1)* %out,
|
|||
|
||||
; GCN-HSA: flat_load_dwordx2
|
||||
|
||||
; EG-DAG: VTX_READ_16 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
|
||||
; EG-DAG: VTX_READ_16 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
|
||||
; EG-DAG: VTX_READ_16 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]]
|
||||
; EG-DAG: VTX_READ_16 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]]
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Z]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_W]], 0.0, literal
|
||||
; EG: VTX_READ_64 [[DST:T[0-9]\.XY]], {{T[0-9].[XYZW]}}, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; TODO: We should use ASHR instead of LSHR + BFE
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
|
|
@ -228,6 +256,17 @@ define void @global_sextload_v4i16_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i
|
|||
; FUNC-LABEL: {{^}}global_zextload_v8i16_to_v8i32:
|
||||
; GCN-NOHSA: buffer_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG: VTX_READ_128 [[DST:T[0-9]\.XYZW]], {{T[0-9].[XYZW]}}, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
define void @global_zextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(1)* %in
|
||||
%ext = zext <8 x i16> %load to <8 x i32>
|
||||
|
|
@ -238,6 +277,25 @@ define void @global_zextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i
|
|||
; FUNC-LABEL: {{^}}global_sextload_v8i16_to_v8i32:
|
||||
; GCN-NOHSA: buffer_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG: VTX_READ_128 [[DST:T[0-9]\.XYZW]], {{T[0-9].[XYZW]}}, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: LSHR {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
; EG-DAG: 16
|
||||
define void @global_sextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(1)* %in
|
||||
%ext = sext <8 x i16> %load to <8 x i32>
|
||||
|
|
@ -251,6 +309,9 @@ define void @global_sextload_v8i16_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i
|
|||
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
define void @global_zextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(1)* %in
|
||||
%ext = zext <16 x i16> %load to <16 x i32>
|
||||
|
|
@ -259,6 +320,9 @@ define void @global_zextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v16i16_to_v16i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
define void @global_sextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(1)* %in
|
||||
%ext = sext <16 x i16> %load to <16 x i32>
|
||||
|
|
@ -276,6 +340,11 @@ define void @global_sextload_v16i16_to_v16i32(<16 x i32> addrspace(1)* %out, <16
|
|||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 48, #1
|
||||
define void @global_zextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(1)* %in
|
||||
%ext = zext <32 x i16> %load to <32 x i32>
|
||||
|
|
@ -293,6 +362,11 @@ define void @global_zextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <32
|
|||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 48, #1
|
||||
define void @global_sextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(1)* %in
|
||||
%ext = sext <32 x i16> %load to <32 x i32>
|
||||
|
|
@ -318,6 +392,15 @@ define void @global_sextload_v32i16_to_v32i32(<32 x i32> addrspace(1)* %out, <32
|
|||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 48, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 64, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 80, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 96, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 112, #1
|
||||
define void @global_zextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <64 x i16>, <64 x i16> addrspace(1)* %in
|
||||
%ext = zext <64 x i16> %load to <64 x i32>
|
||||
|
|
@ -326,6 +409,15 @@ define void @global_zextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <64
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v64i16_to_v64i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 48, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 64, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 80, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 96, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, {{T[0-9]+.[XYZW]}}, 112, #1
|
||||
define void @global_sextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <64 x i16>, <64 x i16> addrspace(1)* %in
|
||||
%ext = sext <64 x i16> %load to <64 x i32>
|
||||
|
|
@ -340,6 +432,9 @@ define void @global_sextload_v64i16_to_v64i32(<64 x i32> addrspace(1)* %out, <64
|
|||
|
||||
; GCN-NOHSA: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]]
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @global_zextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(1)* %in
|
||||
%ext = zext i16 %a to i64
|
||||
|
|
@ -354,6 +449,11 @@ define void @global_zextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)
|
|||
|
||||
; GCN-NOHSA: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]]
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 15 ?
|
||||
; EG: 31
|
||||
define void @global_sextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(1)* %in
|
||||
%ext = sext i16 %a to i64
|
||||
|
|
@ -362,6 +462,9 @@ define void @global_sextload_i16_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v1i16_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @global_zextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(1)* %in
|
||||
%ext = zext <1 x i16> %load to <1 x i64>
|
||||
|
|
@ -370,6 +473,11 @@ define void @global_zextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v1i16_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 15 ?
|
||||
; EG: 31
|
||||
define void @global_sextload_v1i16_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(1)* %in
|
||||
%ext = sext <1 x i16> %load to <1 x i64>
|
||||
|
|
@ -386,6 +494,8 @@ define void @global_zextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v2i16_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(1)* %in
|
||||
%ext = sext <2 x i16> %load to <2 x i64>
|
||||
|
|
@ -394,6 +504,8 @@ define void @global_sextload_v2i16_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v4i16_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(1)* %in
|
||||
%ext = zext <4 x i16> %load to <4 x i64>
|
||||
|
|
@ -402,6 +514,8 @@ define void @global_zextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v4i16_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(1)* %in
|
||||
%ext = sext <4 x i16> %load to <4 x i64>
|
||||
|
|
@ -410,6 +524,8 @@ define void @global_sextload_v4i16_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v8i16_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(1)* %in
|
||||
%ext = zext <8 x i16> %load to <8 x i64>
|
||||
|
|
@ -418,6 +534,8 @@ define void @global_zextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v8i16_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(1)* %in
|
||||
%ext = sext <8 x i16> %load to <8 x i64>
|
||||
|
|
@ -426,6 +544,9 @@ define void @global_sextload_v8i16_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v16i16_to_v16i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @global_zextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(1)* %in
|
||||
%ext = zext <16 x i16> %load to <16 x i64>
|
||||
|
|
@ -434,6 +555,9 @@ define void @global_zextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v16i16_to_v16i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @global_sextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(1)* %in
|
||||
%ext = sext <16 x i16> %load to <16 x i64>
|
||||
|
|
@ -442,6 +566,11 @@ define void @global_sextload_v16i16_to_v16i64(<16 x i64> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v32i16_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 48, #1
|
||||
define void @global_zextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(1)* %in
|
||||
%ext = zext <32 x i16> %load to <32 x i64>
|
||||
|
|
@ -450,6 +579,11 @@ define void @global_zextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <32
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v32i16_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 48, #1
|
||||
define void @global_sextload_v32i16_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i16> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(1)* %in
|
||||
%ext = sext <32 x i16> %load to <32 x i64>
|
||||
|
|
|
|||
|
|
@ -9,7 +9,8 @@
|
|||
; GCN-NOHSA: buffer_load_ubyte v{{[0-9]+}}
|
||||
; GCN-HSA: flat_load_ubyte
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: NOT AND
|
||||
define void @global_load_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load i8, i8 addrspace(1)* %in
|
||||
|
|
@ -21,7 +22,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_ushort v
|
||||
; GCN-HSA: flat_load_ushort v
|
||||
|
||||
; EG: VTX_READ_16
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v2i8(<2 x i8> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <2 x i8>, <2 x i8> addrspace(1)* %in
|
||||
|
|
@ -33,7 +34,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dword v
|
||||
; GCN-HSA: flat_load_dword v
|
||||
|
||||
; EG-DAG: VTX_READ_32
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v3i8(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(1)* %in
|
||||
|
|
@ -45,7 +46,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dword v
|
||||
; GCN-HSA: flat_load_dword v
|
||||
|
||||
; EG: VTX_READ_32
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v4i8(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <4 x i8>, <4 x i8> addrspace(1)* %in
|
||||
|
|
@ -57,7 +58,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dwordx2
|
||||
; GCN-HSA: flat_load_dwordx2
|
||||
|
||||
; EG: VTX_READ_64
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v8i8(<8 x i8> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
|
|
@ -70,7 +71,7 @@ entry:
|
|||
|
||||
; GCN-HSA: flat_load_dwordx4
|
||||
|
||||
; EG: VTX_READ_128
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_load_v16i8(<16 x i8> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
|
|
@ -82,7 +83,7 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_ubyte v{{[0-9]+}},
|
||||
; GCN-HSA: flat_load_ubyte
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(1)* %in
|
||||
%ext = zext i8 %a to i32
|
||||
|
|
@ -94,7 +95,7 @@ define void @global_zextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(1)*
|
|||
; GCN-NOHSA: buffer_load_sbyte
|
||||
; GCN-HSA: flat_load_sbyte
|
||||
|
||||
; EG: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]]
|
||||
; EG: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
|
||||
; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
|
||||
; EG: 8
|
||||
define void @global_sextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
|
|
@ -105,6 +106,8 @@ define void @global_sextload_i8_to_i32(i32 addrspace(1)* %out, i8 addrspace(1)*
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v1i8_to_v1i32:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(1)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i32>
|
||||
|
|
@ -113,6 +116,10 @@ define void @global_zextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v1i8_to_v1i32:
|
||||
|
||||
; EG: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]], 0, #1
|
||||
; EG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST]], 0.0, literal
|
||||
; EG: 8
|
||||
define void @global_sextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(1)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i32>
|
||||
|
|
@ -124,8 +131,10 @@ define void @global_sextload_v1i8_to_v1i32(<1 x i32> addrspace(1)* %out, <1 x i8
|
|||
; GCN-NOHSA: buffer_load_ushort
|
||||
; GCN-HSA: flat_load_ushort
|
||||
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_16 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, literal
|
||||
; EG-DAG: 8
|
||||
define void @global_zextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(1)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i32>
|
||||
|
|
@ -137,10 +146,10 @@ define void @global_zextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i8
|
|||
; GCN-NOHSA: buffer_load_ushort
|
||||
; GCN-HSA: flat_load_ushort
|
||||
|
||||
; EG-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
|
||||
; EG: VTX_READ_16 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_sextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
|
|
@ -157,6 +166,13 @@ define void @global_sextload_v2i8_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x i8
|
|||
; GCN-DAG: v_bfe_u32 v{{[0-9]+}}, v{{[0-9]+}}, 8, 8
|
||||
; GCN-DAG: v_bfe_u32 v{{[0-9]+}}, v{{[0-9]+}}, 16, 8
|
||||
; GCN-DAG: v_and_b32_e32 v{{[0-9]+}}, 0xff,
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_zextload_v3i8_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(1)* %in
|
||||
|
|
@ -172,6 +188,15 @@ entry:
|
|||
; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 8, 8
|
||||
; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 8
|
||||
; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 16, 8
|
||||
|
||||
; EG: VTX_READ_32 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_sextload_v3i8_to_v3i32(<3 x i32> addrspace(1)* %out, <3 x i8> addrspace(1)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(1)* %in
|
||||
|
|
@ -184,10 +209,14 @@ entry:
|
|||
; GCN-NOHSA: buffer_load_dword
|
||||
; GCN-HSA: flat_load_dword
|
||||
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_8
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_zextload_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(1)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i32>
|
||||
|
|
@ -199,14 +228,12 @@ define void @global_zextload_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i8
|
|||
; GCN-NOHSA: buffer_load_dword
|
||||
; GCN-HSA: flat_load_dword
|
||||
|
||||
; EG-DAG: VTX_READ_8 [[DST_X:T[0-9]\.[XYZW]]], [[DST_X]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_Y:T[0-9]\.[XYZW]]], [[DST_Y]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_Z:T[0-9]\.[XYZW]]], [[DST_Z]]
|
||||
; EG-DAG: VTX_READ_8 [[DST_W:T[0-9]\.[XYZW]]], [[DST_W]]
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_X]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Y]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_Z]], 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, [[DST_W]], 0.0, literal
|
||||
; EG: VTX_READ_32 [[DST:T[0-9]+\.X]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
|
|
@ -219,6 +246,23 @@ define void @global_sextload_v4i8_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v8i8_to_v8i32:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_zextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i32>
|
||||
|
|
@ -227,6 +271,25 @@ define void @global_zextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v8i8_to_v8i32:
|
||||
|
||||
; EG: VTX_READ_64 [[DST:T[0-9]+\.XY]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_sextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i32>
|
||||
|
|
@ -235,6 +298,39 @@ define void @global_sextload_v8i8_to_v8i32(<8 x i32> addrspace(1)* %out, <8 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v16i8_to_v16i32:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_zextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i32>
|
||||
|
|
@ -243,6 +339,41 @@ define void @global_zextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v16i8_to_v16i32:
|
||||
|
||||
; EG: VTX_READ_128 [[DST:T[0-9]+\.XYZW]], T{{[0-9]+}}.X, 0, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_sextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i32>
|
||||
|
|
@ -251,6 +382,70 @@ define void @global_sextload_v16i8_to_v16i32(<16 x i32> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v32i8_to_v32i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: BFE_UINT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, {{.*}}literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_zextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(1)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i32>
|
||||
|
|
@ -259,6 +454,74 @@ define void @global_zextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <32
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v32i8_to_v32i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 [[DST_LO:T[0-9]+\.XYZW]], T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 [[DST_HI:T[0-9]+\.XYZW]], T{{[0-9]+}}.X, 16, #1
|
||||
; TODO: These should use DST, but for some there are redundant MOVs
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9]+.[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
; EG-DAG: 8
|
||||
define void @global_sextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <32 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(1)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i32>
|
||||
|
|
@ -267,6 +530,11 @@ define void @global_sextload_v32i8_to_v32i32(<32 x i32> addrspace(1)* %out, <32
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v64i8_to_v64i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 48, #1
|
||||
define void @global_zextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <64 x i8>, <64 x i8> addrspace(1)* %in
|
||||
%ext = zext <64 x i8> %load to <64 x i32>
|
||||
|
|
@ -275,6 +543,11 @@ define void @global_zextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <64
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v64i8_to_v64i32:
|
||||
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 32, #1
|
||||
; EG-DAG: VTX_READ_128 {{T[0-9]+\.XYZW}}, T{{[0-9]+}}.X, 48, #1
|
||||
define void @global_sextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <64 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <64 x i8>, <64 x i8> addrspace(1)* %in
|
||||
%ext = sext <64 x i8> %load to <64 x i32>
|
||||
|
|
@ -290,6 +563,9 @@ define void @global_sextload_v64i8_to_v64i32(<64 x i32> addrspace(1)* %out, <64
|
|||
|
||||
; GCN-HSA-DAG: flat_load_ubyte v[[LO:[0-9]+]],
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]]
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @global_zextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(1)* %in
|
||||
%ext = zext i8 %a to i64
|
||||
|
|
@ -304,6 +580,11 @@ define void @global_zextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(1)*
|
|||
|
||||
; GCN-NOHSA: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
; GCN-HSA: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 7 ?
|
||||
; EG: 31
|
||||
define void @global_sextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(1)* %in
|
||||
%ext = sext i8 %a to i64
|
||||
|
|
@ -312,6 +593,9 @@ define void @global_sextload_i8_to_i64(i64 addrspace(1)* %out, i8 addrspace(1)*
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v1i8_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: MOV {{.*}}, 0.0
|
||||
define void @global_zextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(1)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i64>
|
||||
|
|
@ -320,6 +604,11 @@ define void @global_zextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v1i8_to_v1i64:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG: ASHR {{\**}} {{T[0-9]\.[XYZW]}}, {{.*}}, literal
|
||||
; TODO: Why not 7 ?
|
||||
; EG: 31
|
||||
define void @global_sextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(1)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i64>
|
||||
|
|
@ -328,6 +617,8 @@ define void @global_sextload_v1i8_to_v1i64(<1 x i64> addrspace(1)* %out, <1 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v2i8_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(1)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i64>
|
||||
|
|
@ -336,6 +627,8 @@ define void @global_zextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v2i8_to_v2i64:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(1)* %in
|
||||
%ext = sext <2 x i8> %load to <2 x i64>
|
||||
|
|
@ -344,6 +637,8 @@ define void @global_sextload_v2i8_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v4i8_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(1)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i64>
|
||||
|
|
@ -352,6 +647,8 @@ define void @global_zextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v4i8_to_v4i64:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(1)* %in
|
||||
%ext = sext <4 x i8> %load to <4 x i64>
|
||||
|
|
@ -360,6 +657,8 @@ define void @global_sextload_v4i8_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v8i8_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i64>
|
||||
|
|
@ -368,6 +667,8 @@ define void @global_zextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v8i8_to_v8i64:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i64>
|
||||
|
|
@ -376,6 +677,8 @@ define void @global_sextload_v8i8_to_v8i64(<8 x i64> addrspace(1)* %out, <8 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v16i8_to_v16i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i64>
|
||||
|
|
@ -384,6 +687,8 @@ define void @global_zextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v16i8_to_v16i64:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_sextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i64>
|
||||
|
|
@ -392,6 +697,9 @@ define void @global_sextload_v16i8_to_v16i64(<16 x i64> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v32i8_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @global_zextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(1)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i64>
|
||||
|
|
@ -400,6 +708,9 @@ define void @global_zextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <32
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v32i8_to_v32i64:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @global_sextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <32 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(1)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i64>
|
||||
|
|
@ -429,6 +740,8 @@ define void @global_sextload_v32i8_to_v32i64(<32 x i64> addrspace(1)* %out, <32
|
|||
|
||||
; GCN-HSA: flat_load_ubyte v[[VAL:[0-9]+]],
|
||||
; GCN-HSA: flat_store_short v{{\[[0-9]+:[0-9]+\]}}, v[[VAL]]
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_i8_to_i16(i16 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(1)* %in
|
||||
%ext = zext i8 %a to i16
|
||||
|
|
@ -442,6 +755,9 @@ define void @global_zextload_i8_to_i16(i16 addrspace(1)* %out, i8 addrspace(1)*
|
|||
|
||||
; GCN-NOHSA: buffer_store_short v[[VAL]]
|
||||
; GCN-HSA: flat_store_short v{{\[[0-9]+:[0-9]+\]}}, v[[VAL]]
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_i8_to_i16(i16 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(1)* %in
|
||||
%ext = sext i8 %a to i16
|
||||
|
|
@ -450,6 +766,8 @@ define void @global_sextload_i8_to_i16(i16 addrspace(1)* %out, i8 addrspace(1)*
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v1i8_to_v1i16:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(1)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i16>
|
||||
|
|
@ -458,6 +776,9 @@ define void @global_zextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v1i8_to_v1i16:
|
||||
|
||||
; EG: VTX_READ_8 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(1)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i16>
|
||||
|
|
@ -466,6 +787,8 @@ define void @global_sextload_v1i8_to_v1i16(<1 x i16> addrspace(1)* %out, <1 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v2i8_to_v2i16:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(1)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i16>
|
||||
|
|
@ -474,6 +797,10 @@ define void @global_zextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v2i8_to_v2i16:
|
||||
|
||||
; EG: VTX_READ_16 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(1)* %in
|
||||
%ext = sext <2 x i8> %load to <2 x i16>
|
||||
|
|
@ -482,6 +809,8 @@ define void @global_sextload_v2i8_to_v2i16(<2 x i16> addrspace(1)* %out, <2 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v4i8_to_v4i16:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(1)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i16>
|
||||
|
|
@ -490,6 +819,12 @@ define void @global_zextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v4i8_to_v4i16:
|
||||
|
||||
; EG: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(1)* %in
|
||||
%ext = sext <4 x i8> %load to <4 x i16>
|
||||
|
|
@ -498,6 +833,8 @@ define void @global_sextload_v4i8_to_v4i16(<4 x i16> addrspace(1)* %out, <4 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v8i8_to_v8i16:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i16>
|
||||
|
|
@ -506,6 +843,16 @@ define void @global_zextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v8i8_to_v8i16:
|
||||
|
||||
; EG: VTX_READ_64 T{{[0-9]+}}.XY, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(1)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i16>
|
||||
|
|
@ -514,6 +861,8 @@ define void @global_sextload_v8i8_to_v8i16(<8 x i16> addrspace(1)* %out, <8 x i8
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v16i8_to_v16i16:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
define void @global_zextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i16>
|
||||
|
|
@ -522,6 +871,24 @@ define void @global_zextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v16i8_to_v16i16:
|
||||
|
||||
; EG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <16 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(1)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i16>
|
||||
|
|
@ -530,6 +897,9 @@ define void @global_sextload_v16i8_to_v16i16(<16 x i16> addrspace(1)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_zextload_v32i8_to_v32i16:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
define void @global_zextload_v32i8_to_v32i16(<32 x i16> addrspace(1)* %out, <32 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(1)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i16>
|
||||
|
|
@ -538,6 +908,41 @@ define void @global_zextload_v32i8_to_v32i16(<32 x i16> addrspace(1)* %out, <32
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}global_sextload_v32i8_to_v32i16:
|
||||
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0, #1
|
||||
; EG-DAG: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 16, #1
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
; EG-DAG: BFE_INT {{[* ]*}}T{{[0-9].[XYZW]}}, {{.*}}, 0.0, literal
|
||||
define void @global_sextload_v32i8_to_v32i16(<32 x i16> addrspace(1)* %out, <32 x i8> addrspace(1)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(1)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i16>
|
||||
|
|
|
|||
|
|
@ -5,7 +5,11 @@
|
|||
; FUNC-LABEL: {{^}}local_load_i16:
|
||||
; GCN: ds_read_u16 v{{[0-9]+}}
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG: LDS_SHORT_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_load_i16(i16 addrspace(3)* %out, i16 addrspace(3)* %in) {
|
||||
entry:
|
||||
%ld = load i16, i16 addrspace(3)* %in
|
||||
|
|
@ -16,7 +20,11 @@ entry:
|
|||
; FUNC-LABEL: {{^}}local_load_v2i16:
|
||||
; GCN: ds_read_b32
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_load_v2i16(<2 x i16> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) {
|
||||
entry:
|
||||
%ld = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
||||
|
|
@ -89,7 +97,11 @@ entry:
|
|||
; GCN: ds_read_u16
|
||||
; GCN: ds_write_b32
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_zextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(3)* %in
|
||||
%ext = zext i16 %a to i32
|
||||
|
|
@ -102,8 +114,13 @@ define void @local_zextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)*
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_i16
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: BFE_INT
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
|
||||
; EG: 16
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_sextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(3)* %in
|
||||
%ext = sext i16 %a to i32
|
||||
|
|
@ -113,6 +130,12 @@ define void @local_sextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)*
|
|||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v1i16_to_v1i32:
|
||||
; GCN: ds_read_u16
|
||||
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_zextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(3)* %in
|
||||
%ext = zext <1 x i16> %load to <1 x i32>
|
||||
|
|
@ -122,6 +145,14 @@ define void @local_zextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i1
|
|||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v1i16_to_v1i32:
|
||||
; GCN: ds_read_i16
|
||||
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
|
||||
; EG: 16
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_sextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(3)* %in
|
||||
%ext = sext <1 x i16> %load to <1 x i32>
|
||||
|
|
@ -134,8 +165,7 @@ define void @local_sextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i1
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_b32
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
||||
%ext = zext <2 x i16> %load to <2 x i32>
|
||||
|
|
@ -148,10 +178,9 @@ define void @local_zextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i1
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_b32
|
||||
|
||||
; EG-DAG: LDS_USHORT_READ_RET
|
||||
; EG-DAG: LDS_USHORT_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG: LDS_READ_RET
|
||||
; EG: BFE_INT
|
||||
; EG: BFE_INT
|
||||
define void @local_sextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
||||
%ext = sext <2 x i16> %load to <2 x i32>
|
||||
|
|
@ -163,6 +192,8 @@ define void @local_sextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i1
|
|||
; GCN: ds_read_b64
|
||||
; GCN-DAG: ds_write_b32
|
||||
; GCN-DAG: ds_write_b64
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_local_zextload_v3i16_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) {
|
||||
entry:
|
||||
%ld = load <3 x i16>, <3 x i16> addrspace(3)* %in
|
||||
|
|
@ -175,6 +206,11 @@ entry:
|
|||
; GCN: ds_read_b64
|
||||
; GCN-DAG: ds_write_b32
|
||||
; GCN-DAG: ds_write_b64
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_local_sextload_v3i16_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) {
|
||||
entry:
|
||||
%ld = load <3 x i16>, <3 x i16> addrspace(3)* %in
|
||||
|
|
@ -188,10 +224,8 @@ entry:
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_b64
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_local_zextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(3)* %in
|
||||
%ext = zext <4 x i16> %load to <4 x i32>
|
||||
|
|
@ -204,10 +238,8 @@ define void @local_local_zextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_b64
|
||||
|
||||
; EG-DAG: LDS_USHORT_READ_RET
|
||||
; EG-DAG: LDS_USHORT_READ_RET
|
||||
; EG-DAG: LDS_USHORT_READ_RET
|
||||
; EG-DAG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
|
|
@ -221,6 +253,11 @@ define void @local_sextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i1
|
|||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v8i16_to_v8i32:
|
||||
; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(3)* %in
|
||||
%ext = zext <8 x i16> %load to <8 x i32>
|
||||
|
|
@ -230,6 +267,19 @@ define void @local_zextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i1
|
|||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v8i16_to_v8i32:
|
||||
; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(3)* %in
|
||||
%ext = sext <8 x i16> %load to <8 x i32>
|
||||
|
|
@ -247,6 +297,15 @@ define void @local_sextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i1
|
|||
; GCN: ds_write2_b64
|
||||
; GCN: ds_write2_b64
|
||||
; GCN: ds_write2_b64
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
||||
%ext = zext <16 x i16> %load to <16 x i32>
|
||||
|
|
@ -258,6 +317,31 @@ define void @local_zextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16
|
|||
; GCN-DAG: ds_read_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}
|
||||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:1 offset1:3{{$}}
|
||||
; GCN-DAG: ds_read_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:16{{$}}
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
||||
%ext = sext <16 x i16> %load to <16 x i32>
|
||||
|
|
@ -270,6 +354,23 @@ define void @local_sextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16
|
|||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3
|
||||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5
|
||||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
||||
%ext = zext <32 x i16> %load to <32 x i32>
|
||||
|
|
@ -282,6 +383,23 @@ define void @local_zextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32
|
|||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:3 offset1:4
|
||||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:5{{$}}
|
||||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_sextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
||||
%ext = sext <32 x i16> %load to <32 x i32>
|
||||
|
|
@ -300,6 +418,39 @@ define void @local_sextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32
|
|||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:9 offset1:10
|
||||
; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:12 offset1:13
|
||||
; GCN-DAG: ds_read_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:112
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <64 x i16>, <64 x i16> addrspace(3)* %in
|
||||
%ext = zext <64 x i16> %load to <64 x i32>
|
||||
|
|
@ -308,6 +459,39 @@ define void @local_zextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v64i16_to_v64i32:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_sextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <64 x i16>, <64 x i16> addrspace(3)* %in
|
||||
%ext = sext <64 x i16> %load to <64 x i32>
|
||||
|
|
@ -320,6 +504,13 @@ define void @local_sextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64
|
|||
; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}}
|
||||
|
||||
; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]]
|
||||
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG-DAG: LDS_WRITE
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_zextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(3)* %in
|
||||
%ext = zext i16 %a to i64
|
||||
|
|
@ -332,6 +523,15 @@ define void @local_zextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)*
|
|||
; GCN-DAG: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
||||
|
||||
; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]]
|
||||
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
|
||||
; EG-DAG: LDS_WRITE
|
||||
; EG-DAG: 16
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_sextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
|
||||
%a = load i16, i16 addrspace(3)* %in
|
||||
%ext = sext i16 %a to i64
|
||||
|
|
@ -340,6 +540,13 @@ define void @local_sextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)*
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v1i16_to_v1i64:
|
||||
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG-DAG: LDS_WRITE
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_zextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(3)* %in
|
||||
%ext = zext <1 x i16> %load to <1 x i64>
|
||||
|
|
@ -348,6 +555,15 @@ define void @local_zextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v1i16_to_v1i64:
|
||||
|
||||
; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
||||
; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
||||
; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
|
||||
; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
||||
; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
|
||||
; EG-DAG: LDS_WRITE
|
||||
; EG-DAG: 16
|
||||
; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
||||
define void @local_sextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i16>, <1 x i16> addrspace(3)* %in
|
||||
%ext = sext <1 x i16> %load to <1 x i64>
|
||||
|
|
@ -356,6 +572,8 @@ define void @local_sextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v2i16_to_v2i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
||||
%ext = zext <2 x i16> %load to <2 x i64>
|
||||
|
|
@ -364,6 +582,10 @@ define void @local_zextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v2i16_to_v2i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
define void @local_sextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
||||
%ext = sext <2 x i16> %load to <2 x i64>
|
||||
|
|
@ -372,6 +594,9 @@ define void @local_sextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v4i16_to_v4i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(3)* %in
|
||||
%ext = zext <4 x i16> %load to <4 x i64>
|
||||
|
|
@ -380,6 +605,13 @@ define void @local_zextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v4i16_to_v4i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
define void @local_sextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i16>, <4 x i16> addrspace(3)* %in
|
||||
%ext = sext <4 x i16> %load to <4 x i64>
|
||||
|
|
@ -388,6 +620,11 @@ define void @local_sextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v8i16_to_v8i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(3)* %in
|
||||
%ext = zext <8 x i16> %load to <8 x i64>
|
||||
|
|
@ -396,6 +633,19 @@ define void @local_zextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v8i16_to_v8i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
define void @local_sextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i16>, <8 x i16> addrspace(3)* %in
|
||||
%ext = sext <8 x i16> %load to <8 x i64>
|
||||
|
|
@ -404,6 +654,15 @@ define void @local_sextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i1
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v16i16_to_v16i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
||||
%ext = zext <16 x i16> %load to <16 x i64>
|
||||
|
|
@ -412,6 +671,31 @@ define void @local_zextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v16i16_to_v16i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
define void @local_sextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
||||
%ext = sext <16 x i16> %load to <16 x i64>
|
||||
|
|
@ -420,6 +704,23 @@ define void @local_sextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v32i16_to_v32i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
||||
%ext = zext <32 x i16> %load to <32 x i64>
|
||||
|
|
@ -428,6 +729,55 @@ define void @local_zextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v32i16_to_v32i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
define void @local_sextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
||||
%ext = sext <32 x i16> %load to <32 x i64>
|
||||
|
|
|
|||
|
|
@ -106,6 +106,8 @@ define void @local_sextload_i8_to_i32(i32 addrspace(3)* %out, i8 addrspace(3)* %
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v1i8_to_v1i32:
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
define void @local_zextload_v1i8_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(3)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i32>
|
||||
|
|
@ -114,6 +116,9 @@ define void @local_zextload_v1i8_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v1i8_to_v1i32:
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: BFE_INT
|
||||
define void @local_sextload_v1i8_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(3)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i32>
|
||||
|
|
@ -124,8 +129,7 @@ define void @local_sextload_v1i8_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i8>
|
|||
; FUNC-LABEL: {{^}}local_zextload_v2i8_to_v2i32:
|
||||
; GCN: ds_read_u16
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
define void @local_zextload_v2i8_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(3)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i32>
|
||||
|
|
@ -140,8 +144,7 @@ define void @local_zextload_v2i8_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i8>
|
|||
; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 8, 8
|
||||
; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 8
|
||||
|
||||
; EG-DAG: LDS_UBYTE_READ_RET
|
||||
; EG-DAG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v2i8_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i8> addrspace(3)* %in) #0 {
|
||||
|
|
@ -157,6 +160,8 @@ define void @local_sextload_v2i8_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i8>
|
|||
; GCN-DAG: v_bfe_u32 v{{[0-9]+}}, v{{[0-9]+}}, 8, 8
|
||||
; GCN-DAG: v_bfe_u32 v{{[0-9]+}}, v{{[0-9]+}}, 16, 8
|
||||
; GCN-DAG: v_and_b32_e32 v{{[0-9]+}}, 0xff,
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v3i8_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i8> addrspace(3)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(3)* %in
|
||||
|
|
@ -178,6 +183,10 @@ entry:
|
|||
; GCN-DAG: ds_write_b64
|
||||
; GCN-DAG: ds_write_b32
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v3i8_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i8> addrspace(3)* %in) #0 {
|
||||
entry:
|
||||
%ld = load <3 x i8>, <3 x i8> addrspace(3)* %in
|
||||
|
|
@ -191,10 +200,10 @@ entry:
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_b32
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
define void @local_zextload_v4i8_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(3)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i32>
|
||||
|
|
@ -207,10 +216,7 @@ define void @local_zextload_v4i8_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i8>
|
|||
; GCN: s_mov_b32 m0
|
||||
; GCN: ds_read_b32
|
||||
|
||||
; EG-DAG: LDS_UBYTE_READ_RET
|
||||
; EG-DAG: LDS_UBYTE_READ_RET
|
||||
; EG-DAG: LDS_UBYTE_READ_RET
|
||||
; EG-DAG: LDS_UBYTE_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
|
|
@ -223,6 +229,15 @@ define void @local_sextload_v4i8_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v8i8_to_v8i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
define void @local_zextload_v8i8_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(3)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i32>
|
||||
|
|
@ -231,6 +246,17 @@ define void @local_zextload_v8i8_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v8i8_to_v8i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v8i8_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(3)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i32>
|
||||
|
|
@ -239,6 +265,23 @@ define void @local_sextload_v8i8_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v16i8_to_v16i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
; EG-DAG: BFE_UINT
|
||||
define void @local_zextload_v16i8_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(3)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i32>
|
||||
|
|
@ -247,6 +290,27 @@ define void @local_zextload_v16i8_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v16i8_to_v16i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v16i8_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(3)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i32>
|
||||
|
|
@ -255,6 +319,15 @@ define void @local_sextload_v16i8_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v32i8_to_v32i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
define void @local_zextload_v32i8_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(3)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i32>
|
||||
|
|
@ -263,6 +336,15 @@ define void @local_zextload_v32i8_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v32i8_to_v32i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
define void @local_sextload_v32i8_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(3)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i32>
|
||||
|
|
@ -271,6 +353,23 @@ define void @local_sextload_v32i8_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v64i8_to_v64i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
define void @local_zextload_v64i8_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <64 x i8>, <64 x i8> addrspace(3)* %in
|
||||
%ext = zext <64 x i8> %load to <64 x i32>
|
||||
|
|
@ -279,6 +378,23 @@ define void @local_zextload_v64i8_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v64i8_to_v64i32:
|
||||
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
; EG-DAG: LDS_READ_RET
|
||||
define void @local_sextload_v64i8_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <64 x i8>, <64 x i8> addrspace(3)* %in
|
||||
%ext = sext <64 x i8> %load to <64 x i32>
|
||||
|
|
@ -290,6 +406,10 @@ define void @local_sextload_v64i8_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x
|
|||
; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}}
|
||||
; GCN-DAG: ds_read_u8 v[[LO:[0-9]+]],
|
||||
; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]]
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: MOV {{.*}}, literal
|
||||
; EG: 0.0
|
||||
define void @local_zextload_i8_to_i64(i64 addrspace(3)* %out, i8 addrspace(3)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(3)* %in
|
||||
%ext = zext i8 %a to i64
|
||||
|
|
@ -302,6 +422,11 @@ define void @local_zextload_i8_to_i64(i64 addrspace(3)* %out, i8 addrspace(3)* %
|
|||
; GCN: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
||||
|
||||
; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]{{\]}}
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: ASHR
|
||||
; TODO: why not 7?
|
||||
; EG: 31
|
||||
define void @local_sextload_i8_to_i64(i64 addrspace(3)* %out, i8 addrspace(3)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(3)* %in
|
||||
%ext = sext i8 %a to i64
|
||||
|
|
@ -310,6 +435,11 @@ define void @local_sextload_i8_to_i64(i64 addrspace(3)* %out, i8 addrspace(3)* %
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v1i8_to_v1i64:
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: MOV {{.*}}, literal
|
||||
; TODO: merge?
|
||||
; EG: 0.0
|
||||
define void @local_zextload_v1i8_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(3)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i64>
|
||||
|
|
@ -318,6 +448,11 @@ define void @local_zextload_v1i8_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v1i8_to_v1i64:
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: ASHR
|
||||
; TODO: why not 7?
|
||||
; EG: 31
|
||||
define void @local_sextload_v1i8_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(3)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i64>
|
||||
|
|
@ -326,6 +461,8 @@ define void @local_sextload_v1i8_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v2i8_to_v2i64:
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
define void @local_zextload_v2i8_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(3)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i64>
|
||||
|
|
@ -334,6 +471,10 @@ define void @local_zextload_v2i8_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v2i8_to_v2i64:
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: BFE_INT
|
||||
; EG: BFE_INT
|
||||
define void @local_sextload_v2i8_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(3)* %in
|
||||
%ext = sext <2 x i8> %load to <2 x i64>
|
||||
|
|
@ -342,6 +483,8 @@ define void @local_sextload_v2i8_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v4i8_to_v4i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v4i8_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(3)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i64>
|
||||
|
|
@ -350,6 +493,8 @@ define void @local_zextload_v4i8_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v4i8_to_v4i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_sextload_v4i8_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(3)* %in
|
||||
%ext = sext <4 x i8> %load to <4 x i64>
|
||||
|
|
@ -358,6 +503,9 @@ define void @local_sextload_v4i8_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v8i8_to_v8i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v8i8_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(3)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i64>
|
||||
|
|
@ -366,6 +514,18 @@ define void @local_zextload_v8i8_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v8i8_to_v8i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
define void @local_sextload_v8i8_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(3)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i64>
|
||||
|
|
@ -374,6 +534,11 @@ define void @local_sextload_v8i8_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v16i8_to_v16i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v16i8_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(3)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i64>
|
||||
|
|
@ -382,6 +547,11 @@ define void @local_zextload_v16i8_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v16i8_to_v16i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_sextload_v16i8_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(3)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i64>
|
||||
|
|
@ -390,6 +560,15 @@ define void @local_sextload_v16i8_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v32i8_to_v32i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_zextload_v32i8_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(3)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i64>
|
||||
|
|
@ -398,6 +577,15 @@ define void @local_zextload_v32i8_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v32i8_to_v32i64:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
define void @local_sextload_v32i8_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(3)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i64>
|
||||
|
|
@ -424,6 +612,9 @@ define void @local_sextload_v32i8_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x
|
|||
; FUNC-LABEL: {{^}}local_zextload_i8_to_i16:
|
||||
; GCN: ds_read_u8 v[[VAL:[0-9]+]],
|
||||
; GCN: ds_write_b16 v[[VAL:[0-9]+]]
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_SHORT_WRITE
|
||||
define void @local_zextload_i8_to_i16(i16 addrspace(3)* %out, i8 addrspace(3)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(3)* %in
|
||||
%ext = zext i8 %a to i16
|
||||
|
|
@ -434,6 +625,10 @@ define void @local_zextload_i8_to_i16(i16 addrspace(3)* %out, i8 addrspace(3)* %
|
|||
; FUNC-LABEL: {{^}}local_sextload_i8_to_i16:
|
||||
; GCN: ds_read_i8 v[[VAL:[0-9]+]],
|
||||
; GCN: ds_write_b16 v{{[0-9]+}}, v[[VAL]]
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: BFE_INT
|
||||
; EG: LDS_SHORT_WRITE
|
||||
define void @local_sextload_i8_to_i16(i16 addrspace(3)* %out, i8 addrspace(3)* %in) #0 {
|
||||
%a = load i8, i8 addrspace(3)* %in
|
||||
%ext = sext i8 %a to i16
|
||||
|
|
@ -442,6 +637,9 @@ define void @local_sextload_i8_to_i16(i16 addrspace(3)* %out, i8 addrspace(3)* %
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v1i8_to_v1i16:
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: LDS_SHORT_WRITE
|
||||
define void @local_zextload_v1i8_to_v1i16(<1 x i16> addrspace(3)* %out, <1 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(3)* %in
|
||||
%ext = zext <1 x i8> %load to <1 x i16>
|
||||
|
|
@ -450,6 +648,10 @@ define void @local_zextload_v1i8_to_v1i16(<1 x i16> addrspace(3)* %out, <1 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v1i8_to_v1i16:
|
||||
|
||||
; EG: LDS_UBYTE_READ_RET
|
||||
; EG: BFE_INT
|
||||
; EG: LDS_SHORT_WRITE
|
||||
define void @local_sextload_v1i8_to_v1i16(<1 x i16> addrspace(3)* %out, <1 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <1 x i8>, <1 x i8> addrspace(3)* %in
|
||||
%ext = sext <1 x i8> %load to <1 x i16>
|
||||
|
|
@ -458,6 +660,9 @@ define void @local_sextload_v1i8_to_v1i16(<1 x i16> addrspace(3)* %out, <1 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v2i8_to_v2i16:
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: LDS_WRITE
|
||||
define void @local_zextload_v2i8_to_v2i16(<2 x i16> addrspace(3)* %out, <2 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(3)* %in
|
||||
%ext = zext <2 x i8> %load to <2 x i16>
|
||||
|
|
@ -466,6 +671,11 @@ define void @local_zextload_v2i8_to_v2i16(<2 x i16> addrspace(3)* %out, <2 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v2i8_to_v2i16:
|
||||
|
||||
; EG: LDS_USHORT_READ_RET
|
||||
; EG: BFE_INT
|
||||
; EG: BFE_INT
|
||||
; EG: LDS_WRITE
|
||||
define void @local_sextload_v2i8_to_v2i16(<2 x i16> addrspace(3)* %out, <2 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <2 x i8>, <2 x i8> addrspace(3)* %in
|
||||
%ext = sext <2 x i8> %load to <2 x i16>
|
||||
|
|
@ -474,6 +684,10 @@ define void @local_sextload_v2i8_to_v2i16(<2 x i16> addrspace(3)* %out, <2 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v4i8_to_v4i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_zextload_v4i8_to_v4i16(<4 x i16> addrspace(3)* %out, <4 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(3)* %in
|
||||
%ext = zext <4 x i8> %load to <4 x i16>
|
||||
|
|
@ -482,6 +696,14 @@ define void @local_zextload_v4i8_to_v4i16(<4 x i16> addrspace(3)* %out, <4 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v4i8_to_v4i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_sextload_v4i8_to_v4i16(<4 x i16> addrspace(3)* %out, <4 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <4 x i8>, <4 x i8> addrspace(3)* %in
|
||||
%ext = sext <4 x i8> %load to <4 x i16>
|
||||
|
|
@ -490,6 +712,13 @@ define void @local_sextload_v4i8_to_v4i16(<4 x i16> addrspace(3)* %out, <4 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v8i8_to_v8i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_zextload_v8i8_to_v8i16(<8 x i16> addrspace(3)* %out, <8 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(3)* %in
|
||||
%ext = zext <8 x i8> %load to <8 x i16>
|
||||
|
|
@ -498,6 +727,21 @@ define void @local_zextload_v8i8_to_v8i16(<8 x i16> addrspace(3)* %out, <8 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v8i8_to_v8i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_sextload_v8i8_to_v8i16(<8 x i16> addrspace(3)* %out, <8 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <8 x i8>, <8 x i8> addrspace(3)* %in
|
||||
%ext = sext <8 x i8> %load to <8 x i16>
|
||||
|
|
@ -506,6 +750,19 @@ define void @local_sextload_v8i8_to_v8i16(<8 x i16> addrspace(3)* %out, <8 x i8>
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v16i8_to_v16i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_zextload_v16i8_to_v16i16(<16 x i16> addrspace(3)* %out, <16 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(3)* %in
|
||||
%ext = zext <16 x i8> %load to <16 x i16>
|
||||
|
|
@ -514,6 +771,35 @@ define void @local_zextload_v16i8_to_v16i16(<16 x i16> addrspace(3)* %out, <16 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v16i8_to_v16i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_sextload_v16i8_to_v16i16(<16 x i16> addrspace(3)* %out, <16 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <16 x i8>, <16 x i8> addrspace(3)* %in
|
||||
%ext = sext <16 x i8> %load to <16 x i16>
|
||||
|
|
@ -522,6 +808,31 @@ define void @local_sextload_v16i8_to_v16i16(<16 x i16> addrspace(3)* %out, <16 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_zextload_v32i8_to_v32i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_zextload_v32i8_to_v32i16(<32 x i16> addrspace(3)* %out, <32 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(3)* %in
|
||||
%ext = zext <32 x i8> %load to <32 x i16>
|
||||
|
|
@ -530,6 +841,63 @@ define void @local_zextload_v32i8_to_v32i16(<32 x i16> addrspace(3)* %out, <32 x
|
|||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}local_sextload_v32i8_to_v32i16:
|
||||
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG: LDS_READ_RET
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: BFE_INT
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG-DAG: ASHR
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
; EG: LDS_WRITE
|
||||
define void @local_sextload_v32i8_to_v32i16(<32 x i16> addrspace(3)* %out, <32 x i8> addrspace(3)* %in) #0 {
|
||||
%load = load <32 x i8>, <32 x i8> addrspace(3)* %in
|
||||
%ext = sext <32 x i8> %load to <32 x i16>
|
||||
|
|
|
|||
Loading…
Reference in New Issue