forked from OSchip/llvm-project
parent
984fac5f5f
commit
3871781c7b
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@ -1388,8 +1388,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
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addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset());
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} else if (RetOpcode == PPC::TCRETURNri) {
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MBBI = prior(MBB.end());
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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assert(JumpTarget.isReg() && "Expecting register operand.");
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assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBCTR));
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} else if (RetOpcode == PPC::TCRETURNai) {
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MBBI = prior(MBB.end());
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@ -1402,8 +1401,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
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addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset());
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} else if (RetOpcode == PPC::TCRETURNri8) {
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MBBI = prior(MBB.end());
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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assert(JumpTarget.isReg() && "Expecting register operand.");
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assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBCTR8));
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} else if (RetOpcode == PPC::TCRETURNai8) {
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MBBI = prior(MBB.end());
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