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[AArch64] Adjust the model for the vector by element FP multiplies on Exynos M1. (NFC) 

llvm-svn: 273708
This commit is contained in:
Evandro Menezes 2016-06-24 18:58:54 +00:00
parent af567592f8
commit 3830479f41
1 changed files with 4 additions and 4 deletions
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8
llvm/lib/Target/AArch64/AArch64SchedM1.td
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@ -309,10 +309,10 @@ def : InstRW<[M1WriteFVAR15], (instregex "FSQRTv.f32")>;
def : InstRW<[M1WriteFVAR23], (instregex "FSQRTv2f64")>;
def : InstRW<[M1WriteNMISC1], (instregex "^F(MAX|MIN)(NM)?V?v")>;
def : InstRW<[M1WriteNMISC2], (instregex "^F(MAX|MIN)(NM)?Pv")>;
def : InstRW<[M1WriteNEONJ], (instregex "^FMULX?v.+_indexed")>;
def : InstRW<[M1WriteFMAC4], (instregex "^FMULX?v")>;
def : InstRW<[M1WriteNEONK], (instregex "^FML[AS]v.+_indexed")>;
def : InstRW<[M1WriteFMAC5], (instregex "^FML[AS]v")>;
def : InstRW<[M1WriteNEONJ], (instregex "^FMULX?v.i")>;
def : InstRW<[M1WriteFMAC4], (instregex "^FMULX?v.f")>;
def : InstRW<[M1WriteNEONK], (instregex "^FML[AS]v.i")>;
def : InstRW<[M1WriteFMAC5], (instregex "^FML[AS]v.f")>;
def : InstRW<[M1WriteFCVT3], (instregex "^FRINT[AIMNPXZ]v")>;
// ASIMD miscellaneous instructions.