maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

replace switch stmt with an assert, generate li 0 instead of lis 0 for 0, 

to make the code follow people's expectations better.

llvm-svn: 22861
This commit is contained in:
Chris Lattner 2005-08-18 17:16:52 +00:00
parent 32d4c85278
commit 37faf35b35
1 changed files with 15 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
View File

@ -1732,26 +1732,23 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
return Result; return Result;
} }
case ISD::Constant: case ISD::Constant: {
switch (N.getValueType()) { assert(N.getValueType() == MVT::i32 &&
default: assert(0 && "Cannot use constants of this type!"); "Only i32 constants are legal on this target!");
case MVT::i32: int v = (int)cast<ConstantSDNode>(N)->getValue();
{ unsigned Hi = Hi16(v);
int v = (int)cast<ConstantSDNode>(N)->getSignExtended(); unsigned Lo = Lo16(v);
unsigned Hi = Hi16(v); if (Hi && Lo) {
unsigned Lo = Lo16(v); Tmp1 = MakeIntReg();
if (Hi && Lo) { BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(Hi);
Tmp1 = MakeIntReg(); BuildMI(BB, PPC::ORI, 2, Result).addReg(Tmp1).addImm(Lo);
BuildMI(BB, PPC::LIS, 1, Tmp1).addSImm(Hi); } else if (Hi) {
BuildMI(BB, PPC::ORI, 2, Result).addReg(Tmp1).addImm(Lo); BuildMI(BB, PPC::LIS, 1, Result).addSImm(Hi);
} else if (Lo) { } else {
BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo); BuildMI(BB, PPC::LI, 1, Result).addSImm(Lo);
} else {
BuildMI(BB, PPC::LIS, 1, Result).addSImm(Hi);
}
}
} }
return Result; return Result;
}
case ISD::ConstantFP: { case ISD::ConstantFP: {
ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N); ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);