forked from OSchip/llvm-project
[PowerPC] Add -m[no-]power10-vector clang and llvm option
Summary: This patch adds command line option for enabling power10-vector support. Reviewers: hfinkel, nemanjai, lei, amyk, #powerpc Reviewed By: lei, amyk, #powerpc Subscribers: wuzish, kbarton, hiraditya, shchenz, cfe-commits, llvm-commits Tags: #llvm, #clang, #powerpc Differential Revision: https://reviews.llvm.org/D80758
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@ -2385,6 +2385,10 @@ def mpower9_vector : Flag<["-"], "mpower9-vector">,
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Group<m_ppc_Features_Group>;
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def mno_power9_vector : Flag<["-"], "mno-power9-vector">,
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Group<m_ppc_Features_Group>;
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def mpower10_vector : Flag<["-"], "mpower10-vector">,
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Group<m_ppc_Features_Group>;
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def mno_power10_vector : Flag<["-"], "mno-power10-vector">,
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Group<m_ppc_Features_Group>;
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def mpower8_crypto : Flag<["-"], "mcrypto">,
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Group<m_ppc_Features_Group>;
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def mnopower8_crypto : Flag<["-"], "mno-crypto">,
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@ -54,6 +54,8 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
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HasFloat128 = true;
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} else if (Feature == "+power9-vector") {
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HasP9Vector = true;
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} else if (Feature == "+power10-vector") {
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HasP10Vector = true;
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} else if (Feature == "+pcrelative-memops") {
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HasPCRelativeMemops = true;
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} else if (Feature == "+spe") {
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@ -193,6 +195,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
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Builder.defineMacro("__FLOAT128__");
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if (HasP9Vector)
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Builder.defineMacro("__POWER9_VECTOR__");
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if (HasP10Vector)
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Builder.defineMacro("__POWER10_VECTOR__");
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
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Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
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@ -227,6 +231,7 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
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// - direct-move
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// - float128
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// - power9-vector
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// - power10-vector
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// then go ahead and error since the customer has expressed an incompatible
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// set of options.
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static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
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@ -248,6 +253,7 @@ static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
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Found |= FindVSXSubfeature("+direct-move", "-mdirect-move");
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Found |= FindVSXSubfeature("+float128", "-mfloat128");
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Found |= FindVSXSubfeature("+power9-vector", "-mpower9-vector");
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Found |= FindVSXSubfeature("+power10-vector", "-mpower10-vector");
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// Return false if any vsx subfeatures was found.
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return !Found;
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@ -348,6 +354,7 @@ bool PPCTargetInfo::initFeatureMap(
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void PPCTargetInfo::addP10SpecificFeatures(
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llvm::StringMap<bool> &Features) const {
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Features["htm"] = false; // HTM was removed for P10.
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Features["power10-vector"] = true;
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Features["pcrelative-memops"] = true;
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return;
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}
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@ -372,6 +379,7 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
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.Case("extdiv", HasExtDiv)
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.Case("float128", HasFloat128)
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.Case("power9-vector", HasP9Vector)
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.Case("power10-vector", HasP10Vector)
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.Case("pcrelative-memops", HasPCRelativeMemops)
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.Case("spe", HasSPE)
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.Default(false);
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@ -387,12 +395,15 @@ void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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.Case("direct-move", true)
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.Case("power8-vector", true)
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.Case("power9-vector", true)
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.Case("power10-vector", true)
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.Case("float128", true)
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.Default(false);
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if (FeatureHasVSX)
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Features["vsx"] = Features["altivec"] = true;
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if (Name == "power9-vector")
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Features["power8-vector"] = true;
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else if (Name == "power10-vector")
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Features["power8-vector"] = Features["power9-vector"] = true;
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if (Name == "pcrel")
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Features["pcrelative-memops"] = true;
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else
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@ -402,9 +413,12 @@ void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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// features.
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if ((Name == "altivec") || (Name == "vsx"))
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Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
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Features["float128"] = Features["power9-vector"] = false;
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Features["float128"] = Features["power9-vector"] =
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Features["power10-vector"] = false;
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if (Name == "power8-vector")
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Features["power9-vector"] = false;
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Features["power9-vector"] = Features["power10-vector"] = false;
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else if (Name == "power9-vector")
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Features["power10-vector"] = false;
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if (Name == "pcrel")
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Features["pcrelative-memops"] = false;
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else
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@ -69,6 +69,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
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bool HasExtDiv = false;
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bool HasP9Vector = false;
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bool HasSPE = false;
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bool HasP10Vector = false;
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bool HasPCRelativeMemops = false;
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protected:
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@ -58,6 +58,14 @@
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// RUN: -mcpu=power9 -std=c++11 -mno-vsx -mfloat128 -mpower9-vector %s 2>&1 | \
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// RUN: FileCheck %s -check-prefix=CHECK-NVSX-MULTI
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// RUN: not %clang -target powerpc64le-unknown-unknown -fsyntax-only \
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// RUN: -mcpu=power10 -std=c++11 %s 2>&1 | FileCheck %s \
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// RUN: -check-prefix=CHECK-DEFAULT-P10
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// RUN: not %clang -target powerpc64le-unknown-unknown -fsyntax-only \
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// RUN: -mcpu=power10 -std=c++11 -mno-vsx -mpower10-vector %s 2>&1 | \
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// RUN: FileCheck %s -check-prefix=CHECK-NVSX-P10V
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#ifdef __VSX__
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static_assert(false, "VSX enabled");
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#endif
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@ -70,6 +78,10 @@ static_assert(false, "P8V enabled");
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static_assert(false, "P9V enabled");
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#endif
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#ifdef __POWER10_VECTOR__
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static_assert(false, "P10V enabled");
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#endif
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#if !defined(__VSX__) && !defined(__POWER8_VECTOR__) && \
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!defined(__POWER9_VECTOR__)
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static_assert(false, "Neither enabled");
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@ -78,8 +90,10 @@ static_assert(false, "Neither enabled");
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// CHECK-DEFAULT: VSX enabled
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// CHECK-DEFAULT: P8V enabled
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// CHECK-DEFAULT-P9: P9V enabled
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// CHECK-DEFAULT-P10: P10V enabled
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// CHECK-NVSX-P8V: error: option '-mpower8-vector' cannot be specified with '-mno-vsx'
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// CHECK-NVSX-P9V: error: option '-mpower9-vector' cannot be specified with '-mno-vsx'
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// CHECK-NVSX-P10V: error: option '-mpower10-vector' cannot be specified with '-mno-vsx'
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// CHECK-NVSX-FLT128: error: option '-mfloat128' cannot be specified with '-mno-vsx'
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// CHECK-NVSX-DMV: error: option '-mdirect-move' cannot be specified with '-mno-vsx'
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// CHECK-NVSX-MULTI: error: option '-mfloat128' cannot be specified with '-mno-vsx'
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@ -150,6 +150,12 @@
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// RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-power8-vector -mpower8-vector -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-P8VECTOR %s
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// CHECK-P8VECTOR: "-target-feature" "+power8-vector"
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// RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-power10-vector -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-NOP10VECTOR %s
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// CHECK-NOP10VECTOR: "-target-feature" "-power10-vector"
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// RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-power10-vector -mpower10-vector -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-P10VECTOR %s
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// CHECK-P10VECTOR: "-target-feature" "+power10-vector"
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// RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-crbits -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-NOCRBITS %s
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// CHECK-NOCRBITS: "-target-feature" "-crbits"
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@ -216,6 +216,10 @@ def FeatureP9Vector : SubtargetFeature<"power9-vector", "HasP9Vector", "true",
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"Enable POWER9 vector instructions",
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[FeatureISA3_0, FeatureP8Vector,
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FeatureP9Altivec]>;
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def FeatureP10Vector : SubtargetFeature<"power10-vector", "HasP10Vector",
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"true",
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"Enable POWER10 vector instructions",
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[FeatureISA3_1, FeatureP9Vector]>;
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// A separate feature for this even though it is equivalent to P9Vector
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// because this is a feature of the implementation rather than the architecture
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// and may go away with future CPU's.
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@ -337,7 +341,7 @@ def ProcessorFeatures {
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// still exist with the exception of those we know are Power9 specific.
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list<SubtargetFeature> P10AdditionalFeatures =
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[DirectivePwr10, FeatureISA3_1, FeaturePrefixInstrs,
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FeaturePCRelativeMemops];
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FeaturePCRelativeMemops, FeatureP10Vector];
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list<SubtargetFeature> P10SpecificFeatures = [];
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list<SubtargetFeature> P10InheritableFeatures =
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!listconcat(P9InheritableFeatures, P10AdditionalFeatures);
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@ -78,6 +78,7 @@ void PPCSubtarget::initializeEnvironment() {
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HasP8Crypto = false;
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HasP9Vector = false;
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HasP9Altivec = false;
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HasP10Vector = false;
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HasPrefixInstrs = false;
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HasPCRelativeMemops = false;
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HasFCPSGN = false;
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@ -105,6 +105,7 @@ protected:
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bool HasP8Crypto;
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bool HasP9Vector;
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bool HasP9Altivec;
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bool HasP10Vector;
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bool HasPrefixInstrs;
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bool HasPCRelativeMemops;
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bool HasFCPSGN;
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@ -262,6 +263,7 @@ public:
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bool hasP8Crypto() const { return HasP8Crypto; }
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bool hasP9Vector() const { return HasP9Vector; }
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bool hasP9Altivec() const { return HasP9Altivec; }
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bool hasP10Vector() const { return HasP10Vector; }
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bool hasPrefixInstrs() const { return HasPrefixInstrs; }
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bool hasPCRelativeMemops() const { return HasPCRelativeMemops; }
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bool hasMFOCRF() const { return HasMFOCRF; }
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