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[OpenCL] AMDGCN target will generate images in constant address space 

Allows AMDGCN target to generate images (such as %opencl.image2d_t) in constant address space.
Images will still be generated in global address space by default.

Added tests to existing opencl-types.cl in test\CodeGenOpenCL.

Patch by Aaron En Ye Shi.

Differential Revision: https://reviews.llvm.org/D22523

llvm-svn: 276161
This commit is contained in:
Yaxun Liu 2016-07-20 19:21:11 +00:00
parent d3f047a38f
commit 37ceedeabd
4 changed files with 39 additions and 16 deletions
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3
clang/lib/CodeGen/CGOpenCLRuntime.cpp
View File

@ -15,6 +15,7 @@
#include "CGOpenCLRuntime.h"
#include "CodeGenFunction.h"
#include "TargetInfo.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/GlobalValue.h"
#include <assert.h>
@ -35,7 +36,7 @@ llvm::Type *CGOpenCLRuntime::convertOpenCLSpecificType(const Type *T) {
llvm::LLVMContext& Ctx = CGM.getLLVMContext();
uint32_t ImgAddrSpc =
CGM.getContext().getTargetAddressSpace(LangAS::opencl_global);
CGM.getTargetCodeGenInfo().getOpenCLImageAddrSpace(CGM);
switch (cast<BuiltinType>(T)->getKind()) {
default:
llvm_unreachable("Unexpected opencl builtin type!");

10
clang/lib/CodeGen/TargetInfo.cpp
View File

@ -375,6 +375,11 @@ TargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib,
unsigned TargetCodeGenInfo::getOpenCLKernelCallingConv() const {
return llvm::CallingConv::C;
}
unsigned TargetCodeGenInfo::getOpenCLImageAddrSpace(CodeGen::CodeGenModule &CGM) const {
return CGM.getContext().getTargetAddressSpace(LangAS::opencl_global);
}
static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
/// isEmptyField - Return true iff a the field is "empty", that is it
@ -6832,6 +6837,7 @@ public:
void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule &M) const override;
unsigned getOpenCLKernelCallingConv() const override;
unsigned getOpenCLImageAddrSpace(CodeGen::CodeGenModule &CGM) const override;
};
}
@ -6868,6 +6874,10 @@ unsigned AMDGPUTargetCodeGenInfo::getOpenCLKernelCallingConv() const {
return llvm::CallingConv::AMDGPU_KERNEL;
}
unsigned AMDGPUTargetCodeGenInfo::getOpenCLImageAddrSpace(CodeGen::CodeGenModule &CGM) const {
return CGM.getContext().getTargetAddressSpace(LangAS::opencl_constant);
}
//===----------------------------------------------------------------------===//
// SPARC v8 ABI Implementation.
// Based on the SPARC Compliance Definition version 2.4.1.

3
clang/lib/CodeGen/TargetInfo.h
View File

@ -220,6 +220,9 @@ public:
/// Get LLVM calling convention for OpenCL kernel.
virtual unsigned getOpenCLKernelCallingConv() const;
/// Get LLVM Image Address Space for OpenCL kernel.
virtual unsigned getOpenCLImageAddrSpace(CodeGen::CodeGenModule &CGM) const;
};
} // namespace CodeGen

39
clang/test/CodeGenOpenCL/opencl_types.cl
View File

@ -1,40 +1,49 @@
// RUN: %clang_cc1 %s -emit-llvm -o - -O0 | FileCheck %s
// RUN: %clang_cc1 %s -triple "spir-unknown-unknown" -emit-llvm -o - -O0 | FileCheck %s --check-prefix=CHECK-SPIR
// RUN: %clang_cc1 %s -triple "amdgcn--amdhsa" -emit-llvm -o - -O0 | FileCheck %s --check-prefix=CHECK-AMDGCN
constant sampler_t glb_smp = 7;
// CHECK: constant i32 7
// CHECK-SPIR: constant i32 7
// CHECK-AMDGCN: addrspace(2) constant i32 7
void fnc1(image1d_t img) {}
// CHECK: @fnc1(%opencl.image1d_ro_t*
// CHECK-SPIR: @fnc1(%opencl.image1d_ro_t addrspace(1)*
// CHECK-AMDGCN: @fnc1(%opencl.image1d_ro_t addrspace(2)*
void fnc1arr(image1d_array_t img) {}
// CHECK: @fnc1arr(%opencl.image1d_array_ro_t*
// CHECK-SPIR: @fnc1arr(%opencl.image1d_array_ro_t addrspace(1)*
// CHECK-AMDGCN: @fnc1arr(%opencl.image1d_array_ro_t addrspace(2)*
void fnc1buff(image1d_buffer_t img) {}
// CHECK: @fnc1buff(%opencl.image1d_buffer_ro_t*
// CHECK-SPIR: @fnc1buff(%opencl.image1d_buffer_ro_t addrspace(1)*
// CHECK-AMDGCN: @fnc1buff(%opencl.image1d_buffer_ro_t addrspace(2)*
void fnc2(image2d_t img) {}
// CHECK: @fnc2(%opencl.image2d_ro_t*
// CHECK-SPIR: @fnc2(%opencl.image2d_ro_t addrspace(1)*
// CHECK-AMDGCN: @fnc2(%opencl.image2d_ro_t addrspace(2)*
void fnc2arr(image2d_array_t img) {}
// CHECK: @fnc2arr(%opencl.image2d_array_ro_t*
// CHECK-SPIR: @fnc2arr(%opencl.image2d_array_ro_t addrspace(1)*
// CHECK-AMDGCN: @fnc2arr(%opencl.image2d_array_ro_t addrspace(2)*
void fnc3(image3d_t img) {}
// CHECK: @fnc3(%opencl.image3d_ro_t*
// CHECK-SPIR: @fnc3(%opencl.image3d_ro_t addrspace(1)*
// CHECK-AMDGCN: @fnc3(%opencl.image3d_ro_t addrspace(2)*
void fnc4smp(sampler_t s) {}
// CHECK-LABEL: define {{.*}}void @fnc4smp(i32
// CHECK-SPIR-LABEL: define {{.*}}void @fnc4smp(i32
kernel void foo(image1d_t img) {
sampler_t smp = 5;
// CHECK: alloca i32
// CHECK-SPIR: alloca i32
event_t evt;
// CHECK: alloca %opencl.event_t*
// CHECK: store i32 5,
// CHECK-SPIR: alloca %opencl.event_t*
// CHECK-SPIR: store i32 5,
fnc4smp(smp);
// CHECK: call {{.*}}void @fnc4smp(i32
// CHECK-SPIR: call {{.*}}void @fnc4smp(i32
fnc4smp(glb_smp);
// CHECK: call {{.*}}void @fnc4smp(i32
// CHECK-SPIR: call {{.*}}void @fnc4smp(i32
}
void __attribute__((overloadable)) bad1(image1d_t b, image2d_t c, image2d_t d) {}
// CHECK-LABEL: @{{_Z4bad114ocl_image1d_ro14ocl_image2d_roS0_|"\\01\?bad1@@\$\$J0YAXPAUocl_image1d_ro@@PAUocl_image2d_ro@@1@Z"}}
// CHECK-SPIR-LABEL: @{{_Z4bad114ocl_image1d_ro14ocl_image2d_roS0_|"\\01\?bad1@@\$\$J0YAXPAUocl_image1d_ro@@PAUocl_image2d_ro@@1@Z"}}
// CHECK-AMDGCN-LABEL: @{{_Z4bad114ocl_image1d_ro14ocl_image2d_roS0_|"\\01\?bad1@@\$\$J0YAXPAUocl_image1d_ro@@PAUocl_image2d_ro@@1@Z"}}(%opencl.image1d_ro_t addrspace(2)*{{.*}}%opencl.image2d_ro_t addrspace(2)*{{.*}}%opencl.image2d_ro_t addrspace(2)*{{.*}})