Revert r373431 "Switch lowering: omit range check for bit tests when default is unreachable (PR43129)"

This broke http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/19967

> Switch lowering: omit range check for bit tests when default is unreachable (PR43129)
>
> This is modeled after the same functionality for jump tables, which was
> added in r357067.
>
> Differential revision: https://reviews.llvm.org/D68131

llvm-svn: 373454
This commit is contained in:
Hans Wennborg 2019-10-02 12:08:44 +00:00
parent da4cbae696
commit 372aece777
3 changed files with 21 additions and 27 deletions

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@ -212,14 +212,13 @@ struct BitTestBlock {
BitTestInfo Cases; BitTestInfo Cases;
BranchProbability Prob; BranchProbability Prob;
BranchProbability DefaultProb; BranchProbability DefaultProb;
bool OmitRangeCheck;
BitTestBlock(APInt F, APInt R, const Value *SV, unsigned Rg, MVT RgVT, bool E, BitTestBlock(APInt F, APInt R, const Value *SV, unsigned Rg, MVT RgVT, bool E,
bool CR, MachineBasicBlock *P, MachineBasicBlock *D, bool CR, MachineBasicBlock *P, MachineBasicBlock *D,
BitTestInfo C, BranchProbability Pr) BitTestInfo C, BranchProbability Pr)
: First(std::move(F)), Range(std::move(R)), SValue(SV), Reg(Rg), : First(std::move(F)), Range(std::move(R)), SValue(SV), Reg(Rg),
RegVT(RgVT), Emitted(E), ContiguousRange(CR), Parent(P), Default(D), RegVT(RgVT), Emitted(E), ContiguousRange(CR), Parent(P), Default(D),
Cases(std::move(C)), Prob(Pr), OmitRangeCheck(false) {} Cases(std::move(C)), Prob(Pr) {}
}; };
/// Return the range of values within a range. /// Return the range of values within a range.

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@ -2622,11 +2622,17 @@ void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B,
// Subtract the minimum value. // Subtract the minimum value.
SDValue SwitchOp = getValue(B.SValue); SDValue SwitchOp = getValue(B.SValue);
EVT VT = SwitchOp.getValueType(); EVT VT = SwitchOp.getValueType();
SDValue RangeSub = SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, SwitchOp,
DAG.getNode(ISD::SUB, dl, VT, SwitchOp, DAG.getConstant(B.First, dl, VT)); DAG.getConstant(B.First, dl, VT));
// Check range.
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
SDValue RangeCmp = DAG.getSetCC(
dl, TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(),
Sub.getValueType()),
Sub, DAG.getConstant(B.Range, dl, VT), ISD::SETUGT);
// Determine the type of the test operands. // Determine the type of the test operands.
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
bool UsePtrType = false; bool UsePtrType = false;
if (!TLI.isTypeLegal(VT)) { if (!TLI.isTypeLegal(VT)) {
UsePtrType = true; UsePtrType = true;
@ -2639,7 +2645,6 @@ void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B,
break; break;
} }
} }
SDValue Sub = RangeSub;
if (UsePtrType) { if (UsePtrType) {
VT = TLI.getPointerTy(DAG.getDataLayout()); VT = TLI.getPointerTy(DAG.getDataLayout());
Sub = DAG.getZExtOrTrunc(Sub, dl, VT); Sub = DAG.getZExtOrTrunc(Sub, dl, VT);
@ -2655,24 +2660,16 @@ void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B,
addSuccessorWithProb(SwitchBB, MBB, B.Prob); addSuccessorWithProb(SwitchBB, MBB, B.Prob);
SwitchBB->normalizeSuccProbs(); SwitchBB->normalizeSuccProbs();
SDValue Root = CopyTo; SDValue BrRange = DAG.getNode(ISD::BRCOND, dl,
if (!B.OmitRangeCheck) { MVT::Other, CopyTo, RangeCmp,
// Conditional branch to the default block. DAG.getBasicBlock(B.Default));
SDValue RangeCmp = DAG.getSetCC(dl,
TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(),
RangeSub.getValueType()),
RangeSub, DAG.getConstant(B.Range, dl, RangeSub.getValueType()),
ISD::SETUGT);
Root = DAG.getNode(ISD::BRCOND, dl, MVT::Other, Root, RangeCmp,
DAG.getBasicBlock(B.Default));
}
// Avoid emitting unnecessary branches to the next block. // Avoid emitting unnecessary branches to the next block.
if (MBB != NextBlock(SwitchBB)) if (MBB != NextBlock(SwitchBB))
Root = DAG.getNode(ISD::BR, dl, MVT::Other, Root, DAG.getBasicBlock(MBB)); BrRange = DAG.getNode(ISD::BR, dl, MVT::Other, BrRange,
DAG.getBasicBlock(MBB));
DAG.setRoot(Root); DAG.setRoot(BrRange);
} }
/// visitBitTestCase - this function produces one "bit test" /// visitBitTestCase - this function produces one "bit test"
@ -10167,6 +10164,8 @@ void SelectionDAGBuilder::lowerWorkItem(SwitchWorkListItem W, Value *Cond,
break; break;
} }
case CC_BitTests: { case CC_BitTests: {
// FIXME: If Fallthrough is unreachable, skip the range check.
// FIXME: Optimize away range check based on pivot comparisons. // FIXME: Optimize away range check based on pivot comparisons.
BitTestBlock *BTB = &SL->BitTestCases[I->BTCasesIndex]; BitTestBlock *BTB = &SL->BitTestCases[I->BTCasesIndex];
@ -10187,11 +10186,6 @@ void SelectionDAGBuilder::lowerWorkItem(SwitchWorkListItem W, Value *Cond,
BTB->DefaultProb -= DefaultProb / 2; BTB->DefaultProb -= DefaultProb / 2;
} }
if (FallthroughUnreachable) {
// Skip the range check if the fallthrough block is unreachable.
BTB->OmitRangeCheck = true;
}
// If we're in the right place, emit the bit test header right now. // If we're in the right place, emit the bit test header right now.
if (CurMBB == SwitchMBB) { if (CurMBB == SwitchMBB) {
visitBitTestHeader(*BTB, SwitchMBB); visitBitTestHeader(*BTB, SwitchMBB);

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@ -157,12 +157,13 @@ sw.epilog:
} }
; Omit the range check when the default case is unreachable, see PR43129. ; TODO: Omit the range check when the default case is unreachable, see PR43129.
declare void @g(i32) declare void @g(i32)
define void @test5(i32 %x) { define void @test5(i32 %x) {
; CHECK-LABEL: test5 ; CHECK-LABEL: test5
; CHECK-NOT: cmp ; CHECK: cmpl $8, %edi
; CHECK: ja
; 73 = 2^0 + 2^3 + 2^6 ; 73 = 2^0 + 2^3 + 2^6
; CHECK: movl $73 ; CHECK: movl $73