forked from OSchip/llvm-project
LoadStoreVectorizer: Check TTI for vec reg bit width
llvm-svn: 274322
This commit is contained in:
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42ad17059a
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370e8226c7
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@ -183,7 +183,7 @@ namespace {
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(void) llvm::createInstructionSimplifierPass();
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(void) llvm::createLoopVectorizePass();
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(void) llvm::createSLPVectorizerPass();
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(void) llvm::createLoadStoreVectorizerPass(128);
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(void) llvm::createLoadStoreVectorizerPass();
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(void) llvm::createBBVectorizePass();
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(void) llvm::createPartiallyInlineLibCallsPass();
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(void) llvm::createScalarizerPass();
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@ -144,7 +144,7 @@ bool vectorizeBasicBlock(Pass *P, BasicBlock &BB,
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// LoadStoreVectorizer - Create vector loads and stores, but leave scalar
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// operations.
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//
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Pass *createLoadStoreVectorizerPass(unsigned VecRegSize = 128);
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Pass *createLoadStoreVectorizerPass();
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} // End llvm namespace
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@ -51,17 +51,18 @@ class Vectorizer {
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AliasAnalysis &AA;
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DominatorTree &DT;
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ScalarEvolution &SE;
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TargetTransformInfo &TTI;
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const DataLayout &DL;
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IRBuilder<> Builder;
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ValueListMap StoreRefs;
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ValueListMap LoadRefs;
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unsigned VecRegSize;
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public:
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Vectorizer(Function &F, AliasAnalysis &AA, DominatorTree &DT,
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ScalarEvolution &SE, unsigned VecRegSize)
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: F(F), AA(AA), DT(DT), SE(SE), DL(F.getParent()->getDataLayout()),
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Builder(SE.getContext()), VecRegSize(VecRegSize) {}
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ScalarEvolution &SE, TargetTransformInfo &TTI)
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: F(F), AA(AA), DT(DT), SE(SE), TTI(TTI),
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DL(F.getParent()->getDataLayout()),
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Builder(SE.getContext()) {}
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bool run();
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@ -116,10 +117,8 @@ private:
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class LoadStoreVectorizer : public FunctionPass {
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public:
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static char ID;
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unsigned VecRegSize;
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LoadStoreVectorizer(unsigned VecRegSize = 128) : FunctionPass(ID),
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VecRegSize(VecRegSize) {
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LoadStoreVectorizer() : FunctionPass(ID) {
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initializeLoadStoreVectorizerPass(*PassRegistry::getPassRegistry());
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}
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@ -133,6 +132,7 @@ public:
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AU.addRequired<AAResultsWrapperPass>();
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AU.addRequired<ScalarEvolutionWrapperPass>();
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.addRequired<TargetTransformInfoWrapperPass>();
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AU.setPreservesCFG();
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}
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};
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@ -144,13 +144,14 @@ INITIALIZE_PASS_DEPENDENCY(SCEVAAWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(GlobalsAAWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
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INITIALIZE_PASS_END(LoadStoreVectorizer, DEBUG_TYPE,
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"Vectorize load and store instructions", false, false);
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char LoadStoreVectorizer::ID = 0;
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Pass *llvm::createLoadStoreVectorizerPass(unsigned VecRegSize) {
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return new LoadStoreVectorizer(VecRegSize);
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Pass *llvm::createLoadStoreVectorizerPass() {
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return new LoadStoreVectorizer();
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}
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bool LoadStoreVectorizer::runOnFunction(Function &F) {
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@ -161,8 +162,10 @@ bool LoadStoreVectorizer::runOnFunction(Function &F) {
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AliasAnalysis &AA = getAnalysis<AAResultsWrapperPass>().getAAResults();
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DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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ScalarEvolution &SE = getAnalysis<ScalarEvolutionWrapperPass>().getSE();
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TargetTransformInfo &TTI
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= getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
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Vectorizer V(F, AA, DT, SE, VecRegSize);
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Vectorizer V(F, AA, DT, SE, TTI);
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return V.run();
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}
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@ -440,6 +443,10 @@ void Vectorizer::collectInstructions(BasicBlock *BB) {
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if (TySize < 8)
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continue;
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Value *Ptr = LI->getPointerOperand();
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unsigned AS = Ptr->getType()->getPointerAddressSpace();
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unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
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// No point in looking at these if they're too big to vectorize.
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if (TySize > VecRegSize / 2)
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continue;
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@ -456,8 +463,8 @@ void Vectorizer::collectInstructions(BasicBlock *BB) {
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// TODO: Target hook to filter types.
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// Save the load locations.
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Value *Ptr = GetUnderlyingObject(LI->getPointerOperand(), DL);
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LoadRefs[Ptr].push_back(LI);
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Value *ObjPtr = GetUnderlyingObject(Ptr, DL);
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LoadRefs[ObjPtr].push_back(LI);
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} else if (StoreInst *SI = dyn_cast<StoreInst>(&I)) {
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if (!SI->isSimple())
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@ -473,6 +480,9 @@ void Vectorizer::collectInstructions(BasicBlock *BB) {
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if (TySize < 8)
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continue;
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Value *Ptr = SI->getPointerOperand();
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unsigned AS = Ptr->getType()->getPointerAddressSpace();
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unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
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if (TySize > VecRegSize / 2)
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continue;
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@ -485,8 +495,8 @@ void Vectorizer::collectInstructions(BasicBlock *BB) {
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continue;
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// Save store location.
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Value *Ptr = GetUnderlyingObject(SI->getPointerOperand(), DL);
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StoreRefs[Ptr].push_back(SI);
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Value *ObjPtr = GetUnderlyingObject(Ptr, DL);
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StoreRefs[ObjPtr].push_back(SI);
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}
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}
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}
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@ -592,6 +602,8 @@ bool Vectorizer::vectorizeStoreChain(ArrayRef<Value *> Chain) {
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}
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unsigned Sz = DL.getTypeSizeInBits(StoreTy);
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unsigned AS = S0->getPointerAddressSpace();
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unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
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unsigned VF = VecRegSize / Sz;
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unsigned ChainSize = Chain.size();
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@ -664,7 +676,6 @@ bool Vectorizer::vectorizeStoreChain(ArrayRef<Value *> Chain) {
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// Set insert point.
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Builder.SetInsertPoint(&*Last);
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unsigned AS = S0->getPointerAddressSpace();
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Value *Vec = UndefValue::get(VecTy);
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@ -728,6 +739,8 @@ bool Vectorizer::vectorizeLoadChain(ArrayRef<Value *> Chain) {
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}
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unsigned Sz = DL.getTypeSizeInBits(LoadTy);
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unsigned AS = L0->getPointerAddressSpace();
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unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS);
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unsigned VF = VecRegSize / Sz;
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unsigned ChainSize = Chain.size();
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@ -798,7 +811,6 @@ bool Vectorizer::vectorizeLoadChain(ArrayRef<Value *> Chain) {
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// Set insert point.
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Builder.SetInsertPoint(&*Last);
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unsigned AS = L0->getPointerAddressSpace();
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Value *Bitcast =
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Builder.CreateBitCast(L0->getPointerOperand(), VecTy->getPointerTo(AS));
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@ -0,0 +1,51 @@
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -mattr=+max-private-element-size-4 -load-store-vectorizer -S -o - %s | FileCheck -check-prefix=ELT4 -check-prefix=ALL %s
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -mattr=+max-private-element-size-8 -load-store-vectorizer -S -o - %s | FileCheck -check-prefix=ELT8 -check-prefix=ALL %s
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -mattr=+max-private-element-size-16 -load-store-vectorizer -S -o - %s | FileCheck -check-prefix=ELT16 -check-prefix=ALL %s
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; ALL-LABEL: @merge_private_store_4_vector_elts_loads_v4i32
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; ELT4: store i32
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; ELT4: store i32
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; ELT4: store i32
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; ELT4: store i32
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; ELT8: store <2 x i32>
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; ELT8: store <2 x i32>
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; ELT16: store <4 x i32>
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define void @merge_private_store_4_vector_elts_loads_v4i32(i32* %out) #0 {
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%out.gep.1 = getelementptr i32, i32* %out, i32 1
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%out.gep.2 = getelementptr i32, i32* %out, i32 2
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%out.gep.3 = getelementptr i32, i32* %out, i32 3
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store i32 9, i32* %out
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store i32 1, i32* %out.gep.1
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store i32 23, i32* %out.gep.2
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store i32 19, i32* %out.gep.3
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ret void
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}
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; ALL-LABEL: @merge_private_store_4_vector_elts_loads_v4i8(
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; ALL: store <4 x i8>
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define void @merge_private_store_4_vector_elts_loads_v4i8(i8* %out) #0 {
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%out.gep.1 = getelementptr i8, i8* %out, i32 1
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%out.gep.2 = getelementptr i8, i8* %out, i32 2
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%out.gep.3 = getelementptr i8, i8* %out, i32 3
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store i8 9, i8* %out
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store i8 1, i8* %out.gep.1
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store i8 23, i8* %out.gep.2
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store i8 19, i8* %out.gep.3
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ret void
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}
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; ALL-LABEL: @merge_private_store_4_vector_elts_loads_v2i16(
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; ALL: store <2 x i16>
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define void @merge_private_store_4_vector_elts_loads_v2i16(i16* %out) #0 {
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%out.gep.1 = getelementptr i16, i16* %out, i32 1
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store i16 9, i16* %out
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store i16 12, i16* %out.gep.1
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ret void
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}
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attributes #0 = { nounwind }
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@ -502,7 +502,8 @@ define void @merge_local_store_2_constants_i32_align_2(i32 addrspace(3)* %out) #
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}
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; CHECK-LABEL: @merge_local_store_4_constants_i32
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; CHECK: store <4 x i32> <i32 1234, i32 123, i32 456, i32 333>, <4 x i32> addrspace(3)*
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; CHECK: store <2 x i32> <i32 456, i32 333>, <2 x i32> addrspace(3)*
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; CHECK: store <2 x i32> <i32 1234, i32 123>, <2 x i32> addrspace(3)*
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define void @merge_local_store_4_constants_i32(i32 addrspace(3)* %out) #0 {
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%out.gep.1 = getelementptr i32, i32 addrspace(3)* %out, i32 1
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%out.gep.2 = getelementptr i32, i32 addrspace(3)* %out, i32 2
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