forked from OSchip/llvm-project
[LV] Add addiitonal tests for pointer difference memory checks.
Additional tests for D119078.
This commit is contained in:
Florian Hahn
parent
4ae24d9fd9
commit
368d35a894
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt %s -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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define void @same_step_and_size(i32* %a, i32* %b, i64 %n) {
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; CHECK-LABEL: @same_step_and_size(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
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; CHECK-NEXT: [[A3:%.*]] = bitcast i32* [[A:%.*]] to i8*
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
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; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.a = getelementptr inbounds i32, i32* %a, i64 %iv
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%l = load i32, i32* %gep.a
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%mul = mul nsw i32 %l, 3
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%gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
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store i32 %mul, i32* %gep.b
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @same_step_and_size_no_dominance_between_accesses(i32* %a, i32* %b, i64 %n, i64 %x) {
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; CHECK-LABEL: @same_step_and_size_no_dominance_between_accesses(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
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; CHECK-NEXT: [[A3:%.*]] = bitcast i32* [[A:%.*]] to i8*
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
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; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%cmp = icmp ne i64 %iv, %x
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br i1 %cmp, label %then, label %else
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then:
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%gep.a = getelementptr inbounds i32, i32* %a, i64 %iv
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store i32 0, i32* %gep.a
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br label %loop.latch
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else:
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%gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
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store i32 10, i32* %gep.b
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br label %loop.latch
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loop.latch:
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @different_steps_and_different_access_sizes(i16* %a, i32* %b, i64 %n) {
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; CHECK-LABEL: @different_steps_and_different_access_sizes(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
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; CHECK-NEXT: [[A3:%.*]] = bitcast i16* [[A:%.*]] to i8*
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
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; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i16, i16* [[A]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i16* [[SCEVGEP4]] to i8*
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.a = getelementptr inbounds i16, i16* %a, i64 %iv
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%l = load i16, i16* %gep.a
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%l.ext = sext i16 %l to i32
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%mul = mul nsw i32 %l.ext, 3
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%gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
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store i32 %mul, i32* %gep.b
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @steps_match_but_different_access_sizes_1([2 x i16]* %a, i32* %b, i64 %n) {
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; CHECK-LABEL: @steps_match_but_different_access_sizes_1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
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; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A:%.*]], i64 0, i64 1
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; CHECK-NEXT: [[SCEVGEP34:%.*]] = bitcast i16* [[SCEVGEP3]] to i8*
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; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A]], i64 [[N]], i64 0
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; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i16* [[SCEVGEP5]] to i8*
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP56]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[SCEVGEP34]], [[SCEVGEP2]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.a = getelementptr inbounds [2 x i16], [2 x i16]* %a, i64 %iv, i64 1
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%l = load i16, i16* %gep.a
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%l.ext = sext i16 %l to i32
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%mul = mul nsw i32 %l.ext, 3
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%gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
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store i32 %mul, i32* %gep.b
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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; Same as @steps_match_but_different_access_sizes_1, but with source and sink
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; accesses flipped.
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define void @steps_match_but_different_access_sizes_2([2 x i16]* %a, i32* %b, i64 %n) {
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; CHECK-LABEL: @steps_match_but_different_access_sizes_2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[B4:%.*]] = bitcast i32* [[B:%.*]] to i8*
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
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; CHECK: vector.memcheck:
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A:%.*]], i64 0, i64 1
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; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast i16* [[SCEVGEP]] to i8*
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; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A]], i64 [[N]], i64 0
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; CHECK-NEXT: [[SCEVGEP23:%.*]] = bitcast i16* [[SCEVGEP2]] to i8*
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; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
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; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i32* [[SCEVGEP5]] to i8*
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SCEVGEP1]], [[SCEVGEP56]]
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[B4]], [[SCEVGEP23]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
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%l = load i32, i32* %gep.b
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%mul = mul nsw i32 %l, 3
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%gep.a = getelementptr inbounds [2 x i16], [2 x i16]* %a, i64 %iv, i64 1
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%trunc = trunc i32 %mul to i16
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store i16 %trunc, i16* %gep.a
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %n
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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