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Revert "[Reassociate] Update test cases due to r222142." 

This reverts commit r222144.  Commit r222142 is being reverted due to
a spec2006/gcc execution-time regression.

Update mips-varargs test as well.

llvm-svn: 222397
This commit is contained in:
Chad Rosier 2014-11-19 23:20:35 +00:00
parent 21866546ae
commit 36577d037f
4 changed files with 11 additions and 11 deletions
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4
clang/test/CodeGen/aarch64-neon-intrinsics.c
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@ -8172,13 +8172,13 @@ int64_t test_vcltzd_s64(int64_t a) {
int64_t test_vtstd_s64(int64_t a, int64_t b) {
// CHECK-LABEL: test_vtstd_s64
// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x0, x1}}
// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x1, x0}}
return (int64_t)vtstd_s64(a, b);
}
uint64_t test_vtstd_u64(uint64_t a, uint64_t b) {
// CHECK-LABEL: test_vtstd_u64
// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x0, x1}}
// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x1, x0}}
return (uint64_t)vtstd_u64(a, b);
}

8
clang/test/CodeGen/bmi-builtins.c
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@ -20,7 +20,7 @@ unsigned short test__tzcnt_u16(unsigned short __X) {
unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) {
// CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1
// CHECK-NEXT: %{{.*}} = and i32 [[DEST]], %{{.*}}
// CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]]
return __andn_u32(__X, __Y);
}
@ -54,7 +54,7 @@ unsigned int test__tzcnt_u32(unsigned int __X) {
unsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) {
// CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1
// CHECK-NEXT: %{{.*}} = and i64 [[DEST]], %{{.*}}
// CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]]
return __andn_u64(__X, __Y);
}
@ -95,7 +95,7 @@ unsigned short test_tzcnt_u16(unsigned short __X) {
unsigned int test_andn_u32(unsigned int __X, unsigned int __Y) {
// CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1
// CHECK-NEXT: %{{.*}} = and i32 [[DEST]], %{{.*}}
// CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]]
return _andn_u32(__X, __Y);
}
@ -130,7 +130,7 @@ unsigned int test_tzcnt_u32(unsigned int __X) {
unsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) {
// CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1
// CHECK-NEXT: %{{.*}} = and i64 [[DEST]], %{{.*}}
// CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]]
return _andn_u64(__X, __Y);
}

8
clang/test/CodeGen/builtins-arm-exclusive.c
View File

@ -94,7 +94,7 @@ int test_ldrex(char *addr, long long *addr64, float *addrfloat) {
// CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64
// CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64
// CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32
// CHECK: [[INTRES:%.*]] = or i64 [[RESLO64]], [[RESHIHI]]
// CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]]
// CHECK: bitcast i64 [[INTRES]] to double
// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]])
@ -178,7 +178,7 @@ int test_ldaex(char *addr, long long *addr64, float *addrfloat) {
// CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64
// CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64
// CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32
// CHECK: [[INTRES:%.*]] = or i64 [[RESLO64]], [[RESHIHI]]
// CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]]
// CHECK: bitcast i64 [[INTRES]] to double
// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]])
@ -323,7 +323,7 @@ __int128 test_ldrex_128(__int128 *addr) {
// CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128
// CHECK-ARM64: [[RESLO64:%.*]] = zext i64 [[RESLO]] to i128
// CHECK-ARM64: [[RESHIHI:%.*]] = shl nuw i128 [[RESHI64]], 64
// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESLO64]], [[RESHIHI]]
// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESHIHI]], [[RESLO64]]
// CHECK-ARM64: ret i128 [[INTRES]]
}
@ -349,7 +349,7 @@ __int128 test_ldaex_128(__int128 *addr) {
// CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128
// CHECK-ARM64: [[RESLO64:%.*]] = zext i64 [[RESLO]] to i128
// CHECK-ARM64: [[RESHIHI:%.*]] = shl nuw i128 [[RESHI64]], 64
// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESLO64]], [[RESHIHI]]
// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESHIHI]], [[RESLO64]]
// CHECK-ARM64: ret i128 [[INTRES]]
}

2
clang/test/CodeGen/mips-varargs.c
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@ -98,7 +98,7 @@ int test_i32_2args(char *fmt, ...) {
// NEW: [[ARG2:%.+]] = trunc i64 [[TMP4]] to i32
//
// ALL: call void @llvm.va_end(i8* [[VA1]])
// ALL: [[ADD:%.+]] = add nsw i32 [[ARG1]], [[ARG2]]
// ALL: [[ADD:%.+]] = add nsw i32 [[ARG2]], [[ARG1]]
// ALL: ret i32 [[ADD]]
// ALL: }