forked from OSchip/llvm-project
[libunwind] Add SystemZ support
Add support for the SystemZ (s390x) architecture to libunwind. Support should be feature-complete with the exception of unwinding from signal handlers (to be added later). Reviewed by: MaskRay Differential Revision: https://reviews.llvm.org/D124248
This commit is contained in:
Ulrich Weigand
parent
c7662dc3e5
commit
364c5023d2
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@ -29,6 +29,7 @@
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#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_HEXAGON 34
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#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV 64
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#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_VE 143
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#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_S390X 83
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#if defined(_LIBUNWIND_IS_NATIVE_ONLY)
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# if defined(__linux__)
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@ -160,6 +161,11 @@
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# define _LIBUNWIND_CONTEXT_SIZE 67
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# define _LIBUNWIND_CURSOR_SIZE 79
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# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_VE
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# elif defined(__s390x__)
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# define _LIBUNWIND_TARGET_S390X 1
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# define _LIBUNWIND_CONTEXT_SIZE 34
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# define _LIBUNWIND_CURSOR_SIZE 46
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# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_S390X
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# else
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# error "Unsupported architecture."
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# endif
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@ -178,6 +184,7 @@
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# define _LIBUNWIND_TARGET_HEXAGON 1
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# define _LIBUNWIND_TARGET_RISCV 1
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# define _LIBUNWIND_TARGET_VE 1
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# define _LIBUNWIND_TARGET_S390X 1
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# define _LIBUNWIND_CONTEXT_SIZE 167
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# define _LIBUNWIND_CURSOR_SIZE 179
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# define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287
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@ -1177,4 +1177,46 @@ enum {
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UNW_VE_VL = 145,
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};
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// s390x register numbers
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enum {
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UNW_S390X_R0 = 0,
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UNW_S390X_R1 = 1,
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UNW_S390X_R2 = 2,
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UNW_S390X_R3 = 3,
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UNW_S390X_R4 = 4,
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UNW_S390X_R5 = 5,
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UNW_S390X_R6 = 6,
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UNW_S390X_R7 = 7,
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UNW_S390X_R8 = 8,
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UNW_S390X_R9 = 9,
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UNW_S390X_R10 = 10,
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UNW_S390X_R11 = 11,
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UNW_S390X_R12 = 12,
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UNW_S390X_R13 = 13,
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UNW_S390X_R14 = 14,
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UNW_S390X_R15 = 15,
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UNW_S390X_F0 = 16,
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UNW_S390X_F2 = 17,
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UNW_S390X_F4 = 18,
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UNW_S390X_F6 = 19,
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UNW_S390X_F1 = 20,
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UNW_S390X_F3 = 21,
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UNW_S390X_F5 = 22,
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UNW_S390X_F7 = 23,
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UNW_S390X_F8 = 24,
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UNW_S390X_F10 = 25,
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UNW_S390X_F12 = 26,
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UNW_S390X_F14 = 27,
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UNW_S390X_F9 = 28,
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UNW_S390X_F11 = 29,
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UNW_S390X_F13 = 30,
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UNW_S390X_F15 = 31,
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// 32-47 Control Registers
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// 48-63 Access Registers
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UNW_S390X_PSWM = 64,
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UNW_S390X_PSWA = 65,
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// 66-67 Reserved
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// 68-83 Vector Registers %v16-%v31
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};
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#endif
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@ -39,6 +39,7 @@ enum {
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REGISTERS_HEXAGON,
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REGISTERS_RISCV,
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REGISTERS_VE,
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REGISTERS_S390X,
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};
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#if defined(_LIBUNWIND_TARGET_I386)
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@ -4716,6 +4717,293 @@ inline const char *Registers_ve::getRegisterName(int regNum) {
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}
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#endif // _LIBUNWIND_TARGET_VE
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#if defined(_LIBUNWIND_TARGET_S390X)
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/// Registers_s390x holds the register state of a thread in a
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/// 64-bit Linux on IBM zSystems process.
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class _LIBUNWIND_HIDDEN Registers_s390x {
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public:
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Registers_s390x();
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Registers_s390x(const void *registers);
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bool validRegister(int num) const;
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uint64_t getRegister(int num) const;
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void setRegister(int num, uint64_t value);
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bool validFloatRegister(int num) const;
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double getFloatRegister(int num) const;
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void setFloatRegister(int num, double value);
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bool validVectorRegister(int num) const;
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v128 getVectorRegister(int num) const;
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void setVectorRegister(int num, v128 value);
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static const char *getRegisterName(int num);
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void jumpto();
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static int lastDwarfRegNum() { return _LIBUNWIND_HIGHEST_DWARF_REGISTER_S390X; }
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static int getArch() { return REGISTERS_S390X; }
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uint64_t getSP() const { return _registers.__gpr[15]; }
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void setSP(uint64_t value) { _registers.__gpr[15] = value; }
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uint64_t getIP() const { return _registers.__pswa; }
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void setIP(uint64_t value) { _registers.__pswa = value; }
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private:
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struct s390x_thread_state_t {
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uint64_t __pswm; // Problem Status Word: Mask
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uint64_t __pswa; // Problem Status Word: Address (PC)
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uint64_t __gpr[16]; // General Purpose Registers
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double __fpr[16]; // Floating-Point Registers
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};
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s390x_thread_state_t _registers;
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};
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inline Registers_s390x::Registers_s390x(const void *registers) {
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static_assert((check_fit<Registers_s390x, unw_context_t>::does_fit),
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"s390x registers do not fit into unw_context_t");
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memcpy(&_registers, static_cast<const uint8_t *>(registers),
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sizeof(_registers));
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}
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inline Registers_s390x::Registers_s390x() {
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memset(&_registers, 0, sizeof(_registers));
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}
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inline bool Registers_s390x::validRegister(int regNum) const {
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switch (regNum) {
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case UNW_S390X_PSWM:
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case UNW_S390X_PSWA:
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case UNW_REG_IP:
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case UNW_REG_SP:
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return true;
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}
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if (regNum >= UNW_S390X_R0 && regNum <= UNW_S390X_R15)
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return true;
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return false;
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}
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inline uint64_t Registers_s390x::getRegister(int regNum) const {
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if (regNum >= UNW_S390X_R0 && regNum <= UNW_S390X_R15)
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return _registers.__gpr[regNum - UNW_S390X_R0];
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switch (regNum) {
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case UNW_S390X_PSWM:
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return _registers.__pswm;
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case UNW_S390X_PSWA:
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case UNW_REG_IP:
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return _registers.__pswa;
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case UNW_REG_SP:
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return _registers.__gpr[15];
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}
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_LIBUNWIND_ABORT("unsupported s390x register");
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}
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inline void Registers_s390x::setRegister(int regNum, uint64_t value) {
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if (regNum >= UNW_S390X_R0 && regNum <= UNW_S390X_R15) {
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_registers.__gpr[regNum - UNW_S390X_R0] = value;
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return;
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}
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switch (regNum) {
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case UNW_S390X_PSWM:
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_registers.__pswm = value;
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return;
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case UNW_S390X_PSWA:
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case UNW_REG_IP:
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_registers.__pswa = value;
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return;
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case UNW_REG_SP:
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_registers.__gpr[15] = value;
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return;
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}
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_LIBUNWIND_ABORT("unsupported s390x register");
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}
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inline bool Registers_s390x::validFloatRegister(int regNum) const {
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return regNum >= UNW_S390X_F0 && regNum <= UNW_S390X_F15;
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}
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inline double Registers_s390x::getFloatRegister(int regNum) const {
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// NOTE: FPR DWARF register numbers are not consecutive.
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switch (regNum) {
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case UNW_S390X_F0:
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return _registers.__fpr[0];
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case UNW_S390X_F1:
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return _registers.__fpr[1];
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case UNW_S390X_F2:
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return _registers.__fpr[2];
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case UNW_S390X_F3:
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return _registers.__fpr[3];
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case UNW_S390X_F4:
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return _registers.__fpr[4];
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case UNW_S390X_F5:
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return _registers.__fpr[5];
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case UNW_S390X_F6:
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return _registers.__fpr[6];
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case UNW_S390X_F7:
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return _registers.__fpr[7];
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case UNW_S390X_F8:
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return _registers.__fpr[8];
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case UNW_S390X_F9:
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return _registers.__fpr[9];
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case UNW_S390X_F10:
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return _registers.__fpr[10];
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case UNW_S390X_F11:
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return _registers.__fpr[11];
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case UNW_S390X_F12:
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return _registers.__fpr[12];
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case UNW_S390X_F13:
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return _registers.__fpr[13];
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case UNW_S390X_F14:
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return _registers.__fpr[14];
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case UNW_S390X_F15:
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return _registers.__fpr[15];
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}
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_LIBUNWIND_ABORT("unsupported s390x register");
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}
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inline void Registers_s390x::setFloatRegister(int regNum, double value) {
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// NOTE: FPR DWARF register numbers are not consecutive.
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switch (regNum) {
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case UNW_S390X_F0:
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_registers.__fpr[0] = value;
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return;
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case UNW_S390X_F1:
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_registers.__fpr[1] = value;
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return;
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case UNW_S390X_F2:
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_registers.__fpr[2] = value;
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return;
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case UNW_S390X_F3:
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_registers.__fpr[3] = value;
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return;
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case UNW_S390X_F4:
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_registers.__fpr[4] = value;
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return;
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case UNW_S390X_F5:
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_registers.__fpr[5] = value;
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return;
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case UNW_S390X_F6:
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_registers.__fpr[6] = value;
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return;
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case UNW_S390X_F7:
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_registers.__fpr[7] = value;
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return;
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case UNW_S390X_F8:
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_registers.__fpr[8] = value;
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return;
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case UNW_S390X_F9:
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_registers.__fpr[9] = value;
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return;
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case UNW_S390X_F10:
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_registers.__fpr[10] = value;
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return;
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case UNW_S390X_F11:
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_registers.__fpr[11] = value;
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return;
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case UNW_S390X_F12:
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_registers.__fpr[12] = value;
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return;
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case UNW_S390X_F13:
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_registers.__fpr[13] = value;
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return;
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case UNW_S390X_F14:
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_registers.__fpr[14] = value;
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return;
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case UNW_S390X_F15:
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_registers.__fpr[15] = value;
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return;
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}
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_LIBUNWIND_ABORT("unsupported s390x register");
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}
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inline bool Registers_s390x::validVectorRegister(int /*regNum*/) const {
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return false;
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}
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inline v128 Registers_s390x::getVectorRegister(int /*regNum*/) const {
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_LIBUNWIND_ABORT("s390x vector support not implemented");
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}
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inline void Registers_s390x::setVectorRegister(int /*regNum*/, v128 /*value*/) {
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_LIBUNWIND_ABORT("s390x vector support not implemented");
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}
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inline const char *Registers_s390x::getRegisterName(int regNum) {
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switch (regNum) {
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case UNW_REG_IP:
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return "ip";
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case UNW_REG_SP:
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return "sp";
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case UNW_S390X_R0:
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return "r0";
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case UNW_S390X_R1:
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return "r1";
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case UNW_S390X_R2:
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return "r2";
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case UNW_S390X_R3:
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return "r3";
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case UNW_S390X_R4:
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return "r4";
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case UNW_S390X_R5:
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return "r5";
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case UNW_S390X_R6:
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return "r6";
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case UNW_S390X_R7:
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return "r7";
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case UNW_S390X_R8:
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return "r8";
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case UNW_S390X_R9:
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return "r9";
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case UNW_S390X_R10:
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return "r10";
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case UNW_S390X_R11:
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return "r11";
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case UNW_S390X_R12:
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return "r12";
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case UNW_S390X_R13:
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return "r13";
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case UNW_S390X_R14:
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return "r14";
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case UNW_S390X_R15:
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return "r15";
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case UNW_S390X_F0:
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return "f0";
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case UNW_S390X_F1:
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return "f1";
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case UNW_S390X_F2:
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return "f2";
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case UNW_S390X_F3:
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return "f3";
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case UNW_S390X_F4:
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return "f4";
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case UNW_S390X_F5:
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return "f5";
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case UNW_S390X_F6:
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return "f6";
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case UNW_S390X_F7:
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return "f7";
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case UNW_S390X_F8:
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return "f8";
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case UNW_S390X_F9:
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return "f9";
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case UNW_S390X_F10:
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return "f10";
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case UNW_S390X_F11:
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return "f11";
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case UNW_S390X_F12:
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return "f12";
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case UNW_S390X_F13:
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return "f13";
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case UNW_S390X_F14:
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return "f14";
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case UNW_S390X_F15:
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return "f15";
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}
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return "unknown register";
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}
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#endif // _LIBUNWIND_TARGET_S390X
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} // namespace libunwind
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#endif // __REGISTERS_HPP__
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@ -1220,6 +1220,12 @@ private:
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}
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#endif
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#if defined (_LIBUNWIND_TARGET_S390X)
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compact_unwind_encoding_t dwarfEncoding(Registers_s390x &) const {
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return 0;
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}
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#endif
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#endif // defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
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#if defined(_LIBUNWIND_SUPPORT_SEH_UNWIND)
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@ -1252,6 +1252,43 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv)
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ret // jump to ra
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#elif defined(__s390x__)
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DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_s390x6jumptoEv)
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//
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// void libunwind::Registers_s390x::jumpto()
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//
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// On entry:
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// thread_state pointer is in r2
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//
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// Skip PSWM, but load PSWA into r1
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lg %r1, 8(%r2)
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// Restore FPRs
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ld %f0, 144(%r2)
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ld %f1, 152(%r2)
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ld %f2, 160(%r2)
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ld %f3, 168(%r2)
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ld %f4, 176(%r2)
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ld %f5, 184(%r2)
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ld %f6, 192(%r2)
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ld %f7, 200(%r2)
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ld %f8, 208(%r2)
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ld %f9, 216(%r2)
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ld %f10, 224(%r2)
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ld %f11, 232(%r2)
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ld %f12, 240(%r2)
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ld %f13, 248(%r2)
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ld %f14, 256(%r2)
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ld %f15, 264(%r2)
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// Restore GPRs - skipping %r0 and %r1
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lmg %r2, %r15, 32(%r2)
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// Return to PSWA (was loaded into %r1 above)
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br %r1
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#endif
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#endif /* !defined(__USING_SJLJ_EXCEPTIONS__) */
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@ -1179,6 +1179,49 @@ DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
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li a0, 0 // return UNW_ESUCCESS
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ret // jump to ra
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#elif defined(__s390x__)
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//
|
||||
// extern int __unw_getcontext(unw_context_t* thread_state)
|
||||
//
|
||||
// On entry:
|
||||
// thread_state pointer is in r2
|
||||
//
|
||||
DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
|
||||
|
||||
// Save GPRs
|
||||
stmg %r0, %r15, 16(%r2)
|
||||
|
||||
// Save PSWM
|
||||
epsw %r0, %r1
|
||||
stm %r0, %r1, 0(%r2)
|
||||
|
||||
// Store return address as PSWA
|
||||
stg %r14, 8(%r2)
|
||||
|
||||
// Save FPRs
|
||||
std %f0, 144(%r2)
|
||||
std %f1, 152(%r2)
|
||||
std %f2, 160(%r2)
|
||||
std %f3, 168(%r2)
|
||||
std %f4, 176(%r2)
|
||||
std %f5, 184(%r2)
|
||||
std %f6, 192(%r2)
|
||||
std %f7, 200(%r2)
|
||||
std %f8, 208(%r2)
|
||||
std %f9, 216(%r2)
|
||||
std %f10, 224(%r2)
|
||||
std %f11, 232(%r2)
|
||||
std %f12, 240(%r2)
|
||||
std %f13, 248(%r2)
|
||||
std %f14, 256(%r2)
|
||||
std %f15, 264(%r2)
|
||||
|
||||
// Return UNW_ESUCCESS
|
||||
lghi %r2, 0
|
||||
br %r14
|
||||
|
||||
#endif
|
||||
|
||||
WEAK_ALIAS(__unw_getcontext, unw_getcontext)
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@
|
|||
#if defined(__i386__) || defined(__x86_64__) || defined(__powerpc__) || \
|
||||
(!defined(__APPLE__) && defined(__arm__)) || defined(__aarch64__) || \
|
||||
defined(__mips__) || defined(__riscv) || defined(__hexagon__) || \
|
||||
defined(__sparc__)
|
||||
defined(__sparc__) || defined(__s390x__)
|
||||
#if !defined(_LIBUNWIND_BUILD_SJLJ_APIS)
|
||||
#define _LIBUNWIND_BUILD_ZERO_COST_APIS
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -75,6 +75,8 @@ _LIBUNWIND_HIDDEN int __unw_init_local(unw_cursor_t *cursor,
|
|||
# define REGISTER_KIND Registers_riscv
|
||||
#elif defined(__ve__)
|
||||
# define REGISTER_KIND Registers_ve
|
||||
#elif defined(__s390x__)
|
||||
# define REGISTER_KIND Registers_s390x
|
||||
#else
|
||||
# error Architecture not supported
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue