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Dependences: Do not fail in case a schedule eliminates all dependences 

The following example shows a non-parallel loop

void f(int a[]) {
  int i;
  for (i = 0; i < 10; ++i)
    A[i] = A[i+5];
}

which, in case we import a schedule that limits the iteration domain
to 0 <= i < 5, becomes parallel. Previously we crashed in such cases, now we
just recognize it as parallel.

This fixes http://llvm.org/PR19435

Reported-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
llvm-svn: 206318
This commit is contained in:
Tobias Grosser 2014-04-15 20:14:57 +00:00
parent 399093276c
commit 364c136d08
3 changed files with 63 additions and 0 deletions
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7
polly/lib/Analysis/Dependences.cpp
View File

@ -273,6 +273,13 @@ bool Dependences::isParallelDimension(__isl_take isl_set *ScheduleSubset,
Schedule = getCombinedScheduleForSpace(S, ParallelDim);
Deps = isl_union_map_apply_range(Deps, isl_union_map_copy(Schedule));
Deps = isl_union_map_apply_domain(Deps, Schedule);
if (isl_union_map_is_empty(Deps)) {
isl_union_map_free(Deps);
isl_set_free(ScheduleSubset);
return true;
}
ScheduleDeps = isl_map_from_union_map(Deps);
ScheduleDeps =
isl_map_intersect_domain(ScheduleDeps, isl_set_copy(ScheduleSubset));

35
polly/test/Cloog/CodeGen/reduced-domain-eliminates-dependences.ll Normal file
View File

@ -0,0 +1,35 @@
; RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-codegen -polly-vectorizer=polly < %s
; void f(int a[]) {
; int i;
; for (i = 0; i < 10; ++i)
; A[i] = A[i+5];
; }
; In this test case we import a schedule that limits the iteration domain
; to 0 <= i < 5, which makes the loop parallel. Previously we crashed in such
; cases. This test checks that we instead vectorize the loop.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
define void @reduced-domain-eliminates-dependences(i64* %a) {
entry:
br label %bb
bb:
%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb ]
%add = add i64 %indvar, 5
%scevgep.load = getelementptr i64* %a, i64 %add
%scevgep.store = getelementptr i64* %a, i64 %indvar
%val = load i64* %scevgep.load
store i64 %val, i64* %scevgep.store, align 8
%indvar.next = add nsw i64 %indvar, 1
%exitcond = icmp eq i64 %indvar.next, 10
br i1 %exitcond, label %return, label %bb
return:
ret void
}
; CHECK: store <4 x i64> %val_p_vec_full, <4 x i64>* %vector_ptr10

21
polly/test/Cloog/CodeGen/reduced-domain-eliminates-dependences___%bb---%return.jscop Normal file
View File

@ -0,0 +1,21 @@
{
"context" : "{ : }",
"name" : "bb => return",
"statements" : [
{
"accesses" : [
{
"kind" : "read",
"relation" : "{ Stmt_bb[i0] -> MemRef_a[5 + i0] }"
},
{
"kind" : "write",
"relation" : "{ Stmt_bb[i0] -> MemRef_a[i0] }"
}
],
"domain" : "{ Stmt_bb[i0] : i0 >= 0 and i0 <= 10 }",
"name" : "Stmt_bb",
"schedule" : "{ Stmt_bb[i0] -> scattering[0, i0, 0]: i0 < 4 }"
}
]
}