forked from OSchip/llvm-project
[Matrix] Update check lines for strided intrinsics (NFC).
This re-generates some check lines, after the naming of values got improved, to reduce the size of diffs in follow-on patches.
This commit is contained in:
Florian Hahn
parent
cb347a1106
commit
3631239b26
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@ -1,4 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --verbose
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -lower-matrix-intrinsics -matrix-default-layout=row-major -S < %s | FileCheck --check-prefix=RM %s
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@ -45,47 +45,47 @@ entry:
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define <8 x double> @load_fadd_transpose(<8 x double>* %A.Ptr, <8 x double> %b) {
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; CHECK-LABEL: @load_fadd_transpose(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x double>* [[A_PTR:%.*]] to double*
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; CHECK-NEXT: [[COL_CAST:%.*]] = bitcast double* [[TMP0]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD:%.*]] = load <2 x double>, <2 x double>* [[COL_CAST]], align 8
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; CHECK-NEXT: [[COL_GEP:%.*]] = getelementptr double, double* [[TMP0]], i32 2
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; CHECK-NEXT: [[COL_CAST1:%.*]] = bitcast double* [[COL_GEP]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD2:%.*]] = load <2 x double>, <2 x double>* [[COL_CAST1]], align 8
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; CHECK-NEXT: [[COL_GEP3:%.*]] = getelementptr double, double* [[TMP0]], i32 4
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; CHECK-NEXT: [[COL_CAST4:%.*]] = bitcast double* [[COL_GEP3]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD5:%.*]] = load <2 x double>, <2 x double>* [[COL_CAST4]], align 8
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; CHECK-NEXT: [[COL_GEP6:%.*]] = getelementptr double, double* [[TMP0]], i32 6
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; CHECK-NEXT: [[COL_CAST7:%.*]] = bitcast double* [[COL_GEP6]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <2 x double>, <2 x double>* [[COL_CAST7]], align 8
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; CHECK-NEXT: [[SPLIT4:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> undef, <2 x i32> <i32 0, i32 1>
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; CHECK-NEXT: [[SPLIT5:%.*]] = shufflevector <8 x double> [[B]], <8 x double> undef, <2 x i32> <i32 2, i32 3>
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; CHECK-NEXT: [[SPLIT6:%.*]] = shufflevector <8 x double> [[B]], <8 x double> undef, <2 x i32> <i32 4, i32 5>
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; CHECK-NEXT: [[SPLIT7:%.*]] = shufflevector <8 x double> [[B]], <8 x double> undef, <2 x i32> <i32 6, i32 7>
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; CHECK-NEXT: [[TMP0:%.*]] = fadd <2 x double> [[COL_LOAD]], [[SPLIT4]]
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; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[COL_LOAD2]], [[SPLIT5]]
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[COL_LOAD5]], [[SPLIT6]]
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; CHECK-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[COL_LOAD8]], [[SPLIT7]]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP0]], i64 0
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x double> undef, double [[TMP4]], i64 0
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x double> [[TMP1]], i64 0
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; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x double> [[TMP5]], double [[TMP6]], i64 1
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; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP2]], i64 0
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; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x double> [[TMP7]], double [[TMP8]], i64 2
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x double> [[TMP3]], i64 0
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; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x double> [[TMP9]], double [[TMP10]], i64 3
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; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x double> [[TMP0]], i64 1
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; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x double> undef, double [[TMP12]], i64 0
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; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x double> [[TMP1]], i64 1
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; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x double> [[TMP13]], double [[TMP14]], i64 1
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; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x double> [[TMP2]], i64 1
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; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x double> [[TMP15]], double [[TMP16]], i64 2
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; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x double> [[TMP3]], i64 1
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; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x double> [[TMP17]], double [[TMP18]], i64 3
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; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <4 x double> [[TMP11]], <4 x double> [[TMP19]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <8 x double> [[TMP20]]
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; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[TMP0]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD:%.*]] = load <2 x double>, <2 x double>* [[VEC_CAST]], align 8
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; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP0]], i32 2
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; CHECK-NEXT: [[VEC_CAST1:%.*]] = bitcast double* [[VEC_GEP]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD2:%.*]] = load <2 x double>, <2 x double>* [[VEC_CAST1]], align 8
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; CHECK-NEXT: [[VEC_GEP3:%.*]] = getelementptr double, double* [[TMP0]], i32 4
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; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast double* [[VEC_GEP3]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD5:%.*]] = load <2 x double>, <2 x double>* [[VEC_CAST4]], align 8
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; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr double, double* [[TMP0]], i32 6
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; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast double* [[VEC_GEP6]] to <2 x double>*
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; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <2 x double>, <2 x double>* [[VEC_CAST7]], align 8
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; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <8 x double> [[B:%.*]], <8 x double> undef, <2 x i32> <i32 0, i32 1>
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; CHECK-NEXT: [[SPLIT9:%.*]] = shufflevector <8 x double> [[B]], <8 x double> undef, <2 x i32> <i32 2, i32 3>
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; CHECK-NEXT: [[SPLIT10:%.*]] = shufflevector <8 x double> [[B]], <8 x double> undef, <2 x i32> <i32 4, i32 5>
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; CHECK-NEXT: [[SPLIT11:%.*]] = shufflevector <8 x double> [[B]], <8 x double> undef, <2 x i32> <i32 6, i32 7>
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; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[COL_LOAD]], [[SPLIT]]
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[COL_LOAD2]], [[SPLIT9]]
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; CHECK-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[COL_LOAD5]], [[SPLIT10]]
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[COL_LOAD8]], [[SPLIT11]]
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP1]], i64 0
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; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x double> undef, double [[TMP5]], i64 0
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[TMP2]], i64 0
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x double> [[TMP6]], double [[TMP7]], i64 1
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; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP3]], i64 0
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; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x double> [[TMP8]], double [[TMP9]], i64 2
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; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x double> [[TMP4]], i64 0
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; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x double> [[TMP10]], double [[TMP11]], i64 3
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; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x double> [[TMP1]], i64 1
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; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x double> undef, double [[TMP13]], i64 0
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; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x double> [[TMP2]], i64 1
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; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x double> [[TMP14]], double [[TMP15]], i64 1
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; CHECK-NEXT: [[TMP17:%.*]] = extractelement <2 x double> [[TMP3]], i64 1
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; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x double> [[TMP16]], double [[TMP17]], i64 2
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; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x double> [[TMP4]], i64 1
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; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x double> [[TMP18]], double [[TMP19]], i64 3
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; CHECK-NEXT: [[TMP21:%.*]] = shufflevector <4 x double> [[TMP12]], <4 x double> [[TMP20]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <8 x double> [[TMP21]]
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;
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entry:
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%a = load <8 x double>, <8 x double>* %A.Ptr
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%add = fadd <8 x double> %a, %b
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@ -28,11 +28,11 @@ define void @transpose_store(<8 x double> %a, <8 x double>* %Ptr) {
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; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1
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; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x double> [[TMP13]], double [[TMP14]], i64 3
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; CHECK-NEXT: [[TMP16:%.*]] = bitcast <8 x double>* [[PTR:%.*]] to double*
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; CHECK-NEXT: [[TMP17:%.*]] = bitcast double* [[TMP16]] to <4 x double>*
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; CHECK-NEXT: store <4 x double> [[TMP7]], <4 x double>* [[TMP17]], align 8
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; CHECK-NEXT: [[TMP18:%.*]] = getelementptr double, double* [[TMP16]], i32 4
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; CHECK-NEXT: [[TMP19:%.*]] = bitcast double* [[TMP18]] to <4 x double>*
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; CHECK-NEXT: store <4 x double> [[TMP15]], <4 x double>* [[TMP19]], align 8
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; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[TMP16]] to <4 x double>*
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; CHECK-NEXT: store <4 x double> [[TMP7]], <4 x double>* [[VEC_CAST]], align 8
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; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP16]], i32 4
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; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast double* [[VEC_GEP]] to <4 x double>*
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; CHECK-NEXT: store <4 x double> [[TMP15]], <4 x double>* [[VEC_CAST4]], align 8
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; CHECK-NEXT: ret void
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;
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entry:
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@ -28,17 +28,17 @@ define <8 x double> @strided_load_4x4(<8 x double> %in, <8 x double>* %Ptr) {
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; CHECK-NEXT: [[TMP18:%.*]] = shufflevector <2 x double> [[TMP12]], <2 x double> [[TMP16]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <4 x double> [[TMP17]], <4 x double> [[TMP18]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: [[TMP20:%.*]] = bitcast <8 x double>* [[PTR:%.*]] to double*
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; CHECK-NEXT: [[TMP21:%.*]] = bitcast double* [[TMP20]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP21]], align 8
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; CHECK-NEXT: [[TMP22:%.*]] = getelementptr double, double* [[TMP20]], i32 2
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; CHECK-NEXT: [[TMP23:%.*]] = bitcast double* [[TMP22]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP8]], <2 x double>* [[TMP23]], align 8
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; CHECK-NEXT: [[TMP24:%.*]] = getelementptr double, double* [[TMP20]], i32 4
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; CHECK-NEXT: [[TMP25:%.*]] = bitcast double* [[TMP24]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP12]], <2 x double>* [[TMP25]], align 8
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; CHECK-NEXT: [[TMP26:%.*]] = getelementptr double, double* [[TMP20]], i32 6
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; CHECK-NEXT: [[TMP27:%.*]] = bitcast double* [[TMP26]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP16]], <2 x double>* [[TMP27]], align 8
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; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[TMP20]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[VEC_CAST]], align 8
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; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP20]], i32 2
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; CHECK-NEXT: [[VEC_CAST2:%.*]] = bitcast double* [[VEC_GEP]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP8]], <2 x double>* [[VEC_CAST2]], align 8
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; CHECK-NEXT: [[VEC_GEP3:%.*]] = getelementptr double, double* [[TMP20]], i32 4
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; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast double* [[VEC_GEP3]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP12]], <2 x double>* [[VEC_CAST4]], align 8
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; CHECK-NEXT: [[VEC_GEP5:%.*]] = getelementptr double, double* [[TMP20]], i32 6
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; CHECK-NEXT: [[VEC_CAST6:%.*]] = bitcast double* [[VEC_GEP5]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP16]], <2 x double>* [[VEC_CAST6]], align 8
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; CHECK-NEXT: call void @foo(<8 x double> [[TMP19]])
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; CHECK-NEXT: ret <8 x double> [[TMP19]]
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;
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@ -9,69 +9,69 @@
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define <16 x double> @backpropagation_iterations(<16 x double>* %A.Ptr, <16 x double>* %B.Ptr) {
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; CHECK-LABEL: @backpropagation_iterations(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x double>* [[A_PTR:%.*]] to double*
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[TMP1]] to <4 x double>*
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; CHECK-NEXT: [[TMP3:%.*]] = load <4 x double>, <4 x double>* [[TMP2]], align 8
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr double, double* [[TMP1]], i32 4
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP5]] to <4 x double>*
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; CHECK-NEXT: [[TMP7:%.*]] = load <4 x double>, <4 x double>* [[TMP6]], align 8
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; CHECK-NEXT: [[TMP9:%.*]] = getelementptr double, double* [[TMP1]], i32 8
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; CHECK-NEXT: [[TMP10:%.*]] = bitcast double* [[TMP9]] to <4 x double>*
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; CHECK-NEXT: [[TMP11:%.*]] = load <4 x double>, <4 x double>* [[TMP10]], align 8
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; CHECK-NEXT: [[TMP13:%.*]] = getelementptr double, double* [[TMP1]], i32 12
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; CHECK-NEXT: [[TMP14:%.*]] = bitcast double* [[TMP13]] to <4 x double>*
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; CHECK-NEXT: [[TMP15:%.*]] = load <4 x double>, <4 x double>* [[TMP14]], align 8
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; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x double> [[TMP3]], i64 0
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; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x double> undef, double [[TMP16]], i64 0
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; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x double> [[TMP7]], i64 0
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; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x double> [[TMP17]], double [[TMP18]], i64 1
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; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x double> [[TMP11]], i64 0
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; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x double> [[TMP19]], double [[TMP20]], i64 2
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; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x double> [[TMP15]], i64 0
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; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x double> [[TMP21]], double [[TMP22]], i64 3
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; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x double> [[TMP3]], i64 1
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; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x double> undef, double [[TMP24]], i64 0
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; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x double> [[TMP7]], i64 1
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; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x double> [[TMP25]], double [[TMP26]], i64 1
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; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x double> [[TMP11]], i64 1
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; CHECK-NEXT: [[TMP29:%.*]] = insertelement <4 x double> [[TMP27]], double [[TMP28]], i64 2
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; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x double> [[TMP15]], i64 1
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; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x double> [[TMP29]], double [[TMP30]], i64 3
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; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x double> [[TMP3]], i64 2
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; CHECK-NEXT: [[TMP33:%.*]] = insertelement <4 x double> undef, double [[TMP32]], i64 0
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; CHECK-NEXT: [[TMP34:%.*]] = extractelement <4 x double> [[TMP7]], i64 2
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; CHECK-NEXT: [[TMP35:%.*]] = insertelement <4 x double> [[TMP33]], double [[TMP34]], i64 1
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; CHECK-NEXT: [[TMP36:%.*]] = extractelement <4 x double> [[TMP11]], i64 2
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; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x double> [[TMP35]], double [[TMP36]], i64 2
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; CHECK-NEXT: [[TMP38:%.*]] = extractelement <4 x double> [[TMP15]], i64 2
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; CHECK-NEXT: [[TMP39:%.*]] = insertelement <4 x double> [[TMP37]], double [[TMP38]], i64 3
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; CHECK-NEXT: [[TMP40:%.*]] = extractelement <4 x double> [[TMP3]], i64 3
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; CHECK-NEXT: [[TMP41:%.*]] = insertelement <4 x double> undef, double [[TMP40]], i64 0
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; CHECK-NEXT: [[TMP42:%.*]] = extractelement <4 x double> [[TMP7]], i64 3
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; CHECK-NEXT: [[TMP43:%.*]] = insertelement <4 x double> [[TMP41]], double [[TMP42]], i64 1
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; CHECK-NEXT: [[TMP44:%.*]] = extractelement <4 x double> [[TMP11]], i64 3
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; CHECK-NEXT: [[TMP45:%.*]] = insertelement <4 x double> [[TMP43]], double [[TMP44]], i64 2
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; CHECK-NEXT: [[TMP46:%.*]] = extractelement <4 x double> [[TMP15]], i64 3
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; CHECK-NEXT: [[TMP47:%.*]] = insertelement <4 x double> [[TMP45]], double [[TMP46]], i64 3
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; CHECK-NEXT: [[TMP48:%.*]] = bitcast <16 x double>* [[B_PTR:%.*]] to double*
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; CHECK-NEXT: [[TMP49:%.*]] = bitcast double* [[TMP48]] to <4 x double>*
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; CHECK-NEXT: [[TMP50:%.*]] = load <4 x double>, <4 x double>* [[TMP49]], align 8
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; CHECK-NEXT: [[TMP52:%.*]] = getelementptr double, double* [[TMP48]], i32 4
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; CHECK-NEXT: [[TMP53:%.*]] = bitcast double* [[TMP52]] to <4 x double>*
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; CHECK-NEXT: [[TMP54:%.*]] = load <4 x double>, <4 x double>* [[TMP53]], align 8
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; CHECK-NEXT: [[TMP56:%.*]] = getelementptr double, double* [[TMP48]], i32 8
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; CHECK-NEXT: [[TMP57:%.*]] = bitcast double* [[TMP56]] to <4 x double>*
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; CHECK-NEXT: [[TMP58:%.*]] = load <4 x double>, <4 x double>* [[TMP57]], align 8
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; CHECK-NEXT: [[TMP60:%.*]] = getelementptr double, double* [[TMP48]], i32 12
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; CHECK-NEXT: [[TMP61:%.*]] = bitcast double* [[TMP60]] to <4 x double>*
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; CHECK-NEXT: [[TMP62:%.*]] = load <4 x double>, <4 x double>* [[TMP61]], align 8
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; CHECK-NEXT: [[TMP63:%.*]] = fmul <4 x double> [[TMP3]], [[TMP50]]
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; CHECK-NEXT: [[TMP64:%.*]] = fmul <4 x double> [[TMP7]], [[TMP54]]
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; CHECK-NEXT: [[TMP65:%.*]] = fmul <4 x double> [[TMP11]], [[TMP58]]
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; CHECK-NEXT: [[TMP66:%.*]] = fmul <4 x double> [[TMP15]], [[TMP62]]
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; CHECK-NEXT: [[TMP67:%.*]] = shufflevector <4 x double> [[TMP63]], <4 x double> [[TMP64]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: [[TMP68:%.*]] = shufflevector <4 x double> [[TMP65]], <4 x double> [[TMP66]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP69:%.*]] = shufflevector <8 x double> [[TMP67]], <8 x double> [[TMP68]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: ret <16 x double> [[TMP69]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[TMP1]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP1]], i32 4
|
||||
; CHECK-NEXT: [[VEC_CAST1:%.*]] = bitcast double* [[VEC_GEP]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD2:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST1]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP3:%.*]] = getelementptr double, double* [[TMP1]], i32 8
|
||||
; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast double* [[VEC_GEP3]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD5:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST4]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr double, double* [[TMP1]], i32 12
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast double* [[VEC_GEP6]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST7]], align 8
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x double> [[COL_LOAD]], i64 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x double> undef, double [[TMP2]], i64 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[COL_LOAD2]], i64 0
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x double> [[TMP3]], double [[TMP4]], i64 1
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x double> [[COL_LOAD5]], i64 0
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x double> [[TMP5]], double [[TMP6]], i64 2
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x double> [[COL_LOAD8]], i64 0
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x double> [[TMP7]], double [[TMP8]], i64 3
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x double> [[COL_LOAD]], i64 1
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x double> undef, double [[TMP10]], i64 0
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x double> [[COL_LOAD2]], i64 1
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x double> [[TMP11]], double [[TMP12]], i64 1
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x double> [[COL_LOAD5]], i64 1
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x double> [[TMP13]], double [[TMP14]], i64 2
|
||||
; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x double> [[COL_LOAD8]], i64 1
|
||||
; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x double> [[TMP15]], double [[TMP16]], i64 3
|
||||
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x double> [[COL_LOAD]], i64 2
|
||||
; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x double> undef, double [[TMP18]], i64 0
|
||||
; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x double> [[COL_LOAD2]], i64 2
|
||||
; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x double> [[TMP19]], double [[TMP20]], i64 1
|
||||
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x double> [[COL_LOAD5]], i64 2
|
||||
; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x double> [[TMP21]], double [[TMP22]], i64 2
|
||||
; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x double> [[COL_LOAD8]], i64 2
|
||||
; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x double> [[TMP23]], double [[TMP24]], i64 3
|
||||
; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x double> [[COL_LOAD]], i64 3
|
||||
; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x double> undef, double [[TMP26]], i64 0
|
||||
; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x double> [[COL_LOAD2]], i64 3
|
||||
; CHECK-NEXT: [[TMP29:%.*]] = insertelement <4 x double> [[TMP27]], double [[TMP28]], i64 1
|
||||
; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x double> [[COL_LOAD5]], i64 3
|
||||
; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x double> [[TMP29]], double [[TMP30]], i64 2
|
||||
; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x double> [[COL_LOAD8]], i64 3
|
||||
; CHECK-NEXT: [[TMP33:%.*]] = insertelement <4 x double> [[TMP31]], double [[TMP32]], i64 3
|
||||
; CHECK-NEXT: [[TMP34:%.*]] = bitcast <16 x double>* [[B_PTR:%.*]] to double*
|
||||
; CHECK-NEXT: [[VEC_CAST9:%.*]] = bitcast double* [[TMP34]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD10:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST9]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP11:%.*]] = getelementptr double, double* [[TMP34]], i32 4
|
||||
; CHECK-NEXT: [[VEC_CAST12:%.*]] = bitcast double* [[VEC_GEP11]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD13:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST12]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP14:%.*]] = getelementptr double, double* [[TMP34]], i32 8
|
||||
; CHECK-NEXT: [[VEC_CAST15:%.*]] = bitcast double* [[VEC_GEP14]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD16:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST15]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP17:%.*]] = getelementptr double, double* [[TMP34]], i32 12
|
||||
; CHECK-NEXT: [[VEC_CAST18:%.*]] = bitcast double* [[VEC_GEP17]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD19:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST18]], align 8
|
||||
; CHECK-NEXT: [[TMP35:%.*]] = fmul <4 x double> [[COL_LOAD]], [[COL_LOAD10]]
|
||||
; CHECK-NEXT: [[TMP36:%.*]] = fmul <4 x double> [[COL_LOAD2]], [[COL_LOAD13]]
|
||||
; CHECK-NEXT: [[TMP37:%.*]] = fmul <4 x double> [[COL_LOAD5]], [[COL_LOAD16]]
|
||||
; CHECK-NEXT: [[TMP38:%.*]] = fmul <4 x double> [[COL_LOAD8]], [[COL_LOAD19]]
|
||||
; CHECK-NEXT: [[TMP39:%.*]] = shufflevector <4 x double> [[TMP35]], <4 x double> [[TMP36]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <4 x double> [[TMP37]], <4 x double> [[TMP38]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <8 x double> [[TMP39]], <8 x double> [[TMP40]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: ret <16 x double> [[TMP41]]
|
||||
;
|
||||
%A = load <16 x double>, <16 x double>* %A.Ptr
|
||||
%A.trans = tail call <16 x double> @llvm.matrix.transpose.v16f64(<16 x double> %A, i32 4, i32 4)
|
||||
|
|
|
|||
|
|
@ -6,22 +6,22 @@ define <9 x double> @strided_load_3x3(<9 x double>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_3x3(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x double>* [[IN:%.*]] to double*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr double, double* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to <3 x double>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <3 x double>, <3 x double>* [[TMP3]], align 8
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr double, double* [[TMP0]], i32 [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[TMP6]] to <3 x double>*
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <3 x double>, <3 x double>* [[TMP7]], align 8
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = mul i32 2, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr double, double* [[TMP0]], i32 [[TMP9]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP10]] to <3 x double>*
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = load <3 x double>, <3 x double>* [[TMP11]], align 8
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <3 x double> [[TMP4]], <3 x double> [[TMP8]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <3 x double> [[TMP12]], <3 x double> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <6 x double> [[TMP13]], <6 x double> [[TMP14]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
|
||||
; CHECK-NEXT: ret <9 x double> [[TMP15]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[VEC_GEP]] to <3 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <3 x double>, <3 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: [[VEC_START1:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP2:%.*]] = getelementptr double, double* [[TMP0]], i32 [[VEC_START1]]
|
||||
; CHECK-NEXT: [[VEC_CAST3:%.*]] = bitcast double* [[VEC_GEP2]] to <3 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD4:%.*]] = load <3 x double>, <3 x double>* [[VEC_CAST3]], align 8
|
||||
; CHECK-NEXT: [[VEC_START5:%.*]] = mul i32 2, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr double, double* [[TMP0]], i32 [[VEC_START5]]
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast double* [[VEC_GEP6]] to <3 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <3 x double>, <3 x double>* [[VEC_CAST7]], align 8
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x double> [[COL_LOAD]], <3 x double> [[COL_LOAD4]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <3 x double> [[COL_LOAD8]], <3 x double> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <6 x double> [[TMP1]], <6 x double> [[TMP2]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
|
||||
; CHECK-NEXT: ret <9 x double> [[TMP3]]
|
||||
;
|
||||
entry:
|
||||
%load = call <9 x double> @llvm.matrix.columnwise.load(<9 x double>* %in, i32 %stride, i32 3, i32 3)
|
||||
|
|
@ -34,11 +34,11 @@ define <9 x double> @strided_load_9x1(<9 x double>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_9x1(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x double>* [[IN:%.*]] to double*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr double, double* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to <9 x double>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <9 x double>, <9 x double>* [[TMP3]], align 8
|
||||
; CHECK-NEXT: ret <9 x double> [[TMP4]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[VEC_GEP]] to <9 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <9 x double>, <9 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: ret <9 x double> [[COL_LOAD]]
|
||||
;
|
||||
entry:
|
||||
%load = call <9 x double> @llvm.matrix.columnwise.load(<9 x double>* %in, i32 %stride, i32 9, i32 1)
|
||||
|
|
@ -51,16 +51,16 @@ define <8 x double> @strided_load_4x2(<8 x double>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_4x2(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x double>* [[IN:%.*]] to double*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr double, double* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to <4 x double>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x double>, <4 x double>* [[TMP3]], align 8
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr double, double* [[TMP0]], i32 [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[TMP6]] to <4 x double>*
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <4 x double>, <4 x double>* [[TMP7]], align 8
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x double> [[TMP4]], <4 x double> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <8 x double> [[TMP9]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[VEC_GEP]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: [[VEC_START1:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP2:%.*]] = getelementptr double, double* [[TMP0]], i32 [[VEC_START1]]
|
||||
; CHECK-NEXT: [[VEC_CAST3:%.*]] = bitcast double* [[VEC_GEP2]] to <4 x double>*
|
||||
; CHECK-NEXT: [[COL_LOAD4:%.*]] = load <4 x double>, <4 x double>* [[VEC_CAST3]], align 8
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[COL_LOAD]], <4 x double> [[COL_LOAD4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <8 x double> [[TMP1]]
|
||||
;
|
||||
entry:
|
||||
%load = call <8 x double> @llvm.matrix.columnwise.load.v8f64(<8 x double>* %in, i32 %stride, i32 4, i32 2)
|
||||
|
|
|
|||
|
|
@ -6,22 +6,22 @@ define <9 x float> @strided_load_3x3(<9 x float>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_3x3(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x float>* [[IN:%.*]] to float*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <3 x float>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <3 x float>, <3 x float>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, float* [[TMP0]], i32 [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <3 x float>*
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <3 x float>, <3 x float>* [[TMP7]], align 4
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = mul i32 2, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr float, float* [[TMP0]], i32 [[TMP9]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = bitcast float* [[TMP10]] to <3 x float>*
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = load <3 x float>, <3 x float>* [[TMP11]], align 4
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <3 x float> [[TMP4]], <3 x float> [[TMP8]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <3 x float> [[TMP12]], <3 x float> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <6 x float> [[TMP13]], <6 x float> [[TMP14]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
|
||||
; CHECK-NEXT: ret <9 x float> [[TMP15]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr float, float* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast float* [[VEC_GEP]] to <3 x float>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <3 x float>, <3 x float>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_START1:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP2:%.*]] = getelementptr float, float* [[TMP0]], i32 [[VEC_START1]]
|
||||
; CHECK-NEXT: [[VEC_CAST3:%.*]] = bitcast float* [[VEC_GEP2]] to <3 x float>*
|
||||
; CHECK-NEXT: [[COL_LOAD4:%.*]] = load <3 x float>, <3 x float>* [[VEC_CAST3]], align 4
|
||||
; CHECK-NEXT: [[VEC_START5:%.*]] = mul i32 2, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr float, float* [[TMP0]], i32 [[VEC_START5]]
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast float* [[VEC_GEP6]] to <3 x float>*
|
||||
; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <3 x float>, <3 x float>* [[VEC_CAST7]], align 4
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[COL_LOAD]], <3 x float> [[COL_LOAD4]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <3 x float> [[COL_LOAD8]], <3 x float> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <6 x float> [[TMP1]], <6 x float> [[TMP2]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
|
||||
; CHECK-NEXT: ret <9 x float> [[TMP3]]
|
||||
;
|
||||
entry:
|
||||
%load = call <9 x float> @llvm.matrix.columnwise.load(<9 x float>* %in, i32 %stride, i32 3, i32 3)
|
||||
|
|
@ -34,11 +34,11 @@ define <9 x float> @strided_load_9x1(<9 x float>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_9x1(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x float>* [[IN:%.*]] to float*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <9 x float>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <9 x float>, <9 x float>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: ret <9 x float> [[TMP4]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr float, float* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast float* [[VEC_GEP]] to <9 x float>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <9 x float>, <9 x float>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: ret <9 x float> [[COL_LOAD]]
|
||||
;
|
||||
entry:
|
||||
%load = call <9 x float> @llvm.matrix.columnwise.load(<9 x float>* %in, i32 %stride, i32 9, i32 1)
|
||||
|
|
@ -51,16 +51,16 @@ define <8 x float> @strided_load_4x2(<8 x float>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_4x2(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x float>* [[IN:%.*]] to float*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <4 x float>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x float>, <4 x float>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, float* [[TMP0]], i32 [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>*
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP9]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr float, float* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast float* [[VEC_GEP]] to <4 x float>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <4 x float>, <4 x float>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_START1:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP2:%.*]] = getelementptr float, float* [[TMP0]], i32 [[VEC_START1]]
|
||||
; CHECK-NEXT: [[VEC_CAST3:%.*]] = bitcast float* [[VEC_GEP2]] to <4 x float>*
|
||||
; CHECK-NEXT: [[COL_LOAD4:%.*]] = load <4 x float>, <4 x float>* [[VEC_CAST3]], align 4
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[COL_LOAD]], <4 x float> [[COL_LOAD4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
entry:
|
||||
%load = call <8 x float> @llvm.matrix.columnwise.load.v8f32(<8 x float>* %in, i32 %stride, i32 4, i32 2)
|
||||
|
|
|
|||
|
|
@ -6,22 +6,22 @@ define <9 x i32> @strided_load_3x3(<9 x i32>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_3x3(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x i32>* [[IN:%.*]] to i32*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <3 x i32>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <3 x i32>, <3 x i32>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <3 x i32>*
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <3 x i32>, <3 x i32>* [[TMP7]], align 4
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = mul i32 2, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP9]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32* [[TMP10]] to <3 x i32>*
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = load <3 x i32>, <3 x i32>* [[TMP11]], align 4
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <3 x i32> [[TMP4]], <3 x i32> [[TMP8]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <3 x i32> [[TMP12]], <3 x i32> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <6 x i32> [[TMP13]], <6 x i32> [[TMP14]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
|
||||
; CHECK-NEXT: ret <9 x i32> [[TMP15]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast i32* [[VEC_GEP]] to <3 x i32>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <3 x i32>, <3 x i32>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_START1:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[VEC_START1]]
|
||||
; CHECK-NEXT: [[VEC_CAST3:%.*]] = bitcast i32* [[VEC_GEP2]] to <3 x i32>*
|
||||
; CHECK-NEXT: [[COL_LOAD4:%.*]] = load <3 x i32>, <3 x i32>* [[VEC_CAST3]], align 4
|
||||
; CHECK-NEXT: [[VEC_START5:%.*]] = mul i32 2, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[VEC_START5]]
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast i32* [[VEC_GEP6]] to <3 x i32>*
|
||||
; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <3 x i32>, <3 x i32>* [[VEC_CAST7]], align 4
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x i32> [[COL_LOAD]], <3 x i32> [[COL_LOAD4]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <3 x i32> [[COL_LOAD8]], <3 x i32> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <6 x i32> [[TMP1]], <6 x i32> [[TMP2]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
|
||||
; CHECK-NEXT: ret <9 x i32> [[TMP3]]
|
||||
;
|
||||
entry:
|
||||
%load = call <9 x i32> @llvm.matrix.columnwise.load(<9 x i32>* %in, i32 %stride, i32 3, i32 3)
|
||||
|
|
@ -34,11 +34,11 @@ define <9 x i32> @strided_load_9x1(<9 x i32>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_9x1(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x i32>* [[IN:%.*]] to i32*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <9 x i32>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <9 x i32>, <9 x i32>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: ret <9 x i32> [[TMP4]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast i32* [[VEC_GEP]] to <9 x i32>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <9 x i32>, <9 x i32>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: ret <9 x i32> [[COL_LOAD]]
|
||||
;
|
||||
entry:
|
||||
%load = call <9 x i32> @llvm.matrix.columnwise.load(<9 x i32>* %in, i32 %stride, i32 9, i32 1)
|
||||
|
|
@ -51,16 +51,16 @@ define <8 x i32> @strided_load_4x2(<8 x i32>* %in, i32 %stride) {
|
|||
; CHECK-LABEL: @strided_load_4x2(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i32>* [[IN:%.*]] to i32*
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP5]]
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <4 x i32>*
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = load <4 x i32>, <4 x i32>* [[TMP7]], align 4
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <8 x i32> [[TMP9]]
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast i32* [[VEC_GEP]] to <4 x i32>*
|
||||
; CHECK-NEXT: [[COL_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_START1:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[VEC_START1]]
|
||||
; CHECK-NEXT: [[VEC_CAST3:%.*]] = bitcast i32* [[VEC_GEP2]] to <4 x i32>*
|
||||
; CHECK-NEXT: [[COL_LOAD4:%.*]] = load <4 x i32>, <4 x i32>* [[VEC_CAST3]], align 4
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[COL_LOAD]], <4 x i32> [[COL_LOAD4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
|
||||
;
|
||||
entry:
|
||||
%load = call <8 x i32> @llvm.matrix.columnwise.load.v8i32(<8 x i32>* %in, i32 %stride, i32 4, i32 2)
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@ define void @strided_store_3x2(<6 x double> %in, double* %out) {
|
|||
; CHECK-LABEL: @strided_store_3x2(
|
||||
; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x double> [[IN:%.*]], <6 x double> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x double> [[IN]], <6 x double> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[OUT:%.*]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT]], <3 x double>* [[TMP1]], align 8
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr double, double* [[OUT]], i32 5
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT1]], <3 x double>* [[TMP3]], align 8
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[OUT:%.*]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT]], <3 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[OUT]], i32 5
|
||||
; CHECK-NEXT: [[VEC_CAST2:%.*]] = bitcast double* [[VEC_GEP]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT1]], <3 x double>* [[VEC_CAST2]], align 8
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store(<6 x double> %in, double* %out, i32 5, i32 3, i32 2)
|
||||
|
|
@ -21,14 +21,14 @@ define void @strided_store_3x2_nonconst_stride(<6 x double> %in, i32 %stride, do
|
|||
; CHECK-LABEL: @strided_store_3x2_nonconst_stride(
|
||||
; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x double> [[IN:%.*]], <6 x double> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x double> [[IN]], <6 x double> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr double, double* [[OUT:%.*]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT]], <3 x double>* [[TMP3]], align 8
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr double, double* [[OUT]], i32 [[TMP4]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP5]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT1]], <3 x double>* [[TMP6]], align 8
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[OUT:%.*]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[VEC_GEP]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT]], <3 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: [[VEC_START2:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP3:%.*]] = getelementptr double, double* [[OUT]], i32 [[VEC_START2]]
|
||||
; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast double* [[VEC_GEP3]] to <3 x double>*
|
||||
; CHECK-NEXT: store <3 x double> [[SPLIT1]], <3 x double>* [[VEC_CAST4]], align 8
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store(<6 x double> %in, double* %out, i32 %stride, i32 3, i32 2)
|
||||
|
|
@ -45,20 +45,20 @@ define void @strided_store_2x3(<10 x double> %in, double* %out) {
|
|||
; CHECK-NEXT: [[SPLIT2:%.*]] = shufflevector <10 x double> [[IN]], <10 x double> undef, <2 x i32> <i32 4, i32 5>
|
||||
; CHECK-NEXT: [[SPLIT3:%.*]] = shufflevector <10 x double> [[IN]], <10 x double> undef, <2 x i32> <i32 6, i32 7>
|
||||
; CHECK-NEXT: [[SPLIT4:%.*]] = shufflevector <10 x double> [[IN]], <10 x double> undef, <2 x i32> <i32 8, i32 9>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[OUT:%.*]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT]], <2 x double>* [[TMP1]], align 8
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr double, double* [[OUT]], i32 4
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT1]], <2 x double>* [[TMP3]], align 8
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr double, double* [[OUT]], i32 8
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TMP4]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT2]], <2 x double>* [[TMP5]], align 8
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr double, double* [[OUT]], i32 12
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[TMP6]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT3]], <2 x double>* [[TMP7]], align 8
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr double, double* [[OUT]], i32 16
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = bitcast double* [[TMP8]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT4]], <2 x double>* [[TMP9]], align 8
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast double* [[OUT:%.*]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT]], <2 x double>* [[VEC_CAST]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr double, double* [[OUT]], i32 4
|
||||
; CHECK-NEXT: [[VEC_CAST5:%.*]] = bitcast double* [[VEC_GEP]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT1]], <2 x double>* [[VEC_CAST5]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr double, double* [[OUT]], i32 8
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast double* [[VEC_GEP6]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT2]], <2 x double>* [[VEC_CAST7]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP8:%.*]] = getelementptr double, double* [[OUT]], i32 12
|
||||
; CHECK-NEXT: [[VEC_CAST9:%.*]] = bitcast double* [[VEC_GEP8]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT3]], <2 x double>* [[VEC_CAST9]], align 8
|
||||
; CHECK-NEXT: [[VEC_GEP10:%.*]] = getelementptr double, double* [[OUT]], i32 16
|
||||
; CHECK-NEXT: [[VEC_CAST11:%.*]] = bitcast double* [[VEC_GEP10]] to <2 x double>*
|
||||
; CHECK-NEXT: store <2 x double> [[SPLIT4]], <2 x double>* [[VEC_CAST11]], align 8
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store.v10f64(<10 x double> %in, double* %out, i32 4, i32 2, i32 5)
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@ define void @strided_store_3x2(<6 x float> %in, float* %out) {
|
|||
; CHECK-LABEL: @strided_store_3x2(
|
||||
; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x float> [[IN:%.*]], <6 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x float> [[IN]], <6 x float> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[OUT:%.*]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT]], <3 x float>* [[TMP1]], align 4
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[OUT]], i32 5
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT1]], <3 x float>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast float* [[OUT:%.*]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT]], <3 x float>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr float, float* [[OUT]], i32 5
|
||||
; CHECK-NEXT: [[VEC_CAST2:%.*]] = bitcast float* [[VEC_GEP]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT1]], <3 x float>* [[VEC_CAST2]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store(<6 x float> %in, float* %out, i32 5, i32 3, i32 2)
|
||||
|
|
@ -21,14 +21,14 @@ define void @strided_store_3x2_nonconst_stride(<6 x float> %in, i32 %stride, flo
|
|||
; CHECK-LABEL: @strided_store_3x2_nonconst_stride(
|
||||
; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x float> [[IN:%.*]], <6 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x float> [[IN]], <6 x float> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[OUT:%.*]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT]], <3 x float>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr float, float* [[OUT]], i32 [[TMP4]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = bitcast float* [[TMP5]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT1]], <3 x float>* [[TMP6]], align 4
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr float, float* [[OUT:%.*]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast float* [[VEC_GEP]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT]], <3 x float>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_START2:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP3:%.*]] = getelementptr float, float* [[OUT]], i32 [[VEC_START2]]
|
||||
; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast float* [[VEC_GEP3]] to <3 x float>*
|
||||
; CHECK-NEXT: store <3 x float> [[SPLIT1]], <3 x float>* [[VEC_CAST4]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store(<6 x float> %in, float* %out, i32 %stride, i32 3, i32 2)
|
||||
|
|
@ -45,20 +45,20 @@ define void @strided_store_2x3(<10 x float> %in, float* %out) {
|
|||
; CHECK-NEXT: [[SPLIT2:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> undef, <2 x i32> <i32 4, i32 5>
|
||||
; CHECK-NEXT: [[SPLIT3:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> undef, <2 x i32> <i32 6, i32 7>
|
||||
; CHECK-NEXT: [[SPLIT4:%.*]] = shufflevector <10 x float> [[IN]], <10 x float> undef, <2 x i32> <i32 8, i32 9>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[OUT:%.*]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT]], <2 x float>* [[TMP1]], align 4
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, float* [[OUT]], i32 4
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT1]], <2 x float>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, float* [[OUT]], i32 8
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[TMP4]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT2]], <2 x float>* [[TMP5]], align 4
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr float, float* [[OUT]], i32 12
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[TMP6]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT3]], <2 x float>* [[TMP7]], align 4
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr float, float* [[OUT]], i32 16
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = bitcast float* [[TMP8]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT4]], <2 x float>* [[TMP9]], align 4
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast float* [[OUT:%.*]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT]], <2 x float>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr float, float* [[OUT]], i32 4
|
||||
; CHECK-NEXT: [[VEC_CAST5:%.*]] = bitcast float* [[VEC_GEP]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT1]], <2 x float>* [[VEC_CAST5]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr float, float* [[OUT]], i32 8
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast float* [[VEC_GEP6]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT2]], <2 x float>* [[VEC_CAST7]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP8:%.*]] = getelementptr float, float* [[OUT]], i32 12
|
||||
; CHECK-NEXT: [[VEC_CAST9:%.*]] = bitcast float* [[VEC_GEP8]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT3]], <2 x float>* [[VEC_CAST9]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP10:%.*]] = getelementptr float, float* [[OUT]], i32 16
|
||||
; CHECK-NEXT: [[VEC_CAST11:%.*]] = bitcast float* [[VEC_GEP10]] to <2 x float>*
|
||||
; CHECK-NEXT: store <2 x float> [[SPLIT4]], <2 x float>* [[VEC_CAST11]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store.v10f32(<10 x float> %in, float* %out, i32 4, i32 2, i32 5)
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@ define void @strided_store_3x2(<6 x i32> %in, i32* %out) {
|
|||
; CHECK-LABEL: @strided_store_3x2(
|
||||
; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x i32> [[IN:%.*]], <6 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x i32> [[IN]], <6 x i32> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[OUT:%.*]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT]], <3 x i32>* [[TMP1]], align 4
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[OUT]], i32 5
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT1]], <3 x i32>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast i32* [[OUT:%.*]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT]], <3 x i32>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i32, i32* [[OUT]], i32 5
|
||||
; CHECK-NEXT: [[VEC_CAST2:%.*]] = bitcast i32* [[VEC_GEP]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT1]], <3 x i32>* [[VEC_CAST2]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store(<6 x i32> %in, i32* %out, i32 5, i32 3, i32 2)
|
||||
|
|
@ -21,14 +21,14 @@ define void @strided_store_3x2_nonconst_stride(<6 x i32> %in, i32 %stride, i32*
|
|||
; CHECK-LABEL: @strided_store_3x2_nonconst_stride(
|
||||
; CHECK-NEXT: [[SPLIT:%.*]] = shufflevector <6 x i32> [[IN:%.*]], <6 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
||||
; CHECK-NEXT: [[SPLIT1:%.*]] = shufflevector <6 x i32> [[IN]], <6 x i32> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[OUT:%.*]], i32 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT]], <3 x i32>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, i32* [[OUT]], i32 [[TMP4]]
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[TMP5]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT1]], <3 x i32>* [[TMP6]], align 4
|
||||
; CHECK-NEXT: [[VEC_START:%.*]] = mul i32 0, [[STRIDE:%.*]]
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i32, i32* [[OUT:%.*]], i32 [[VEC_START]]
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast i32* [[VEC_GEP]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT]], <3 x i32>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_START2:%.*]] = mul i32 1, [[STRIDE]]
|
||||
; CHECK-NEXT: [[VEC_GEP3:%.*]] = getelementptr i32, i32* [[OUT]], i32 [[VEC_START2]]
|
||||
; CHECK-NEXT: [[VEC_CAST4:%.*]] = bitcast i32* [[VEC_GEP3]] to <3 x i32>*
|
||||
; CHECK-NEXT: store <3 x i32> [[SPLIT1]], <3 x i32>* [[VEC_CAST4]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store(<6 x i32> %in, i32* %out, i32 %stride, i32 3, i32 2)
|
||||
|
|
@ -45,20 +45,20 @@ define void @strided_store_2x3(<10 x i32> %in, i32* %out) {
|
|||
; CHECK-NEXT: [[SPLIT2:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> undef, <2 x i32> <i32 4, i32 5>
|
||||
; CHECK-NEXT: [[SPLIT3:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> undef, <2 x i32> <i32 6, i32 7>
|
||||
; CHECK-NEXT: [[SPLIT4:%.*]] = shufflevector <10 x i32> [[IN]], <10 x i32> undef, <2 x i32> <i32 8, i32 9>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[OUT:%.*]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT]], <2 x i32>* [[TMP1]], align 4
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[OUT]], i32 4
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT1]], <2 x i32>* [[TMP3]], align 4
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, i32* [[OUT]], i32 8
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[TMP4]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT2]], <2 x i32>* [[TMP5]], align 4
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, i32* [[OUT]], i32 12
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT3]], <2 x i32>* [[TMP7]], align 4
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i32, i32* [[OUT]], i32 16
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[TMP8]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT4]], <2 x i32>* [[TMP9]], align 4
|
||||
; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast i32* [[OUT:%.*]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT]], <2 x i32>* [[VEC_CAST]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i32, i32* [[OUT]], i32 4
|
||||
; CHECK-NEXT: [[VEC_CAST5:%.*]] = bitcast i32* [[VEC_GEP]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT1]], <2 x i32>* [[VEC_CAST5]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP6:%.*]] = getelementptr i32, i32* [[OUT]], i32 8
|
||||
; CHECK-NEXT: [[VEC_CAST7:%.*]] = bitcast i32* [[VEC_GEP6]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT2]], <2 x i32>* [[VEC_CAST7]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP8:%.*]] = getelementptr i32, i32* [[OUT]], i32 12
|
||||
; CHECK-NEXT: [[VEC_CAST9:%.*]] = bitcast i32* [[VEC_GEP8]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT3]], <2 x i32>* [[VEC_CAST9]], align 4
|
||||
; CHECK-NEXT: [[VEC_GEP10:%.*]] = getelementptr i32, i32* [[OUT]], i32 16
|
||||
; CHECK-NEXT: [[VEC_CAST11:%.*]] = bitcast i32* [[VEC_GEP10]] to <2 x i32>*
|
||||
; CHECK-NEXT: store <2 x i32> [[SPLIT4]], <2 x i32>* [[VEC_CAST11]], align 4
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
call void @llvm.matrix.columnwise.store.v10i32(<10 x i32> %in, i32* %out, i32 4, i32 2, i32 5)
|
||||
|
|
|
|||
Loading…
Reference in New Issue