From 35fcc294ab5fbfd9bdaa053261d80bc0dd2d7701 Mon Sep 17 00:00:00 2001 From: Peter Collingbourne Date: Fri, 30 Nov 2018 21:04:25 +0000 Subject: [PATCH] AArch64: Don't emit CFI for SCS register in nounwind functions. All that you can legitimately do with the CFI for a nounwind function is get a backtrace, and adjusting the SCS register is not (currently) required for this purpose. Differential Revision: https://reviews.llvm.org/D54988 llvm-svn: 348035 --- .../Target/AArch64/AArch64FrameLowering.cpp | 30 ++++++++++--------- .../test/CodeGen/AArch64/shadow-call-stack.ll | 8 +++++ 2 files changed, 24 insertions(+), 14 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp index 4d44fbbcd1b5..8737c8c3740a 100644 --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -1733,20 +1733,22 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters( BuildMI(MBB, MI, DL, TII.get(AArch64::SEH_Nop)) .setMIFlag(MachineInstr::FrameSetup); - // Emit a CFI instruction that causes 8 to be subtracted from the value of - // x18 when unwinding past this frame. - static const char CFIInst[] = { - dwarf::DW_CFA_val_expression, - 18, // register - 2, // length - static_cast(unsigned(dwarf::DW_OP_breg18)), - static_cast(-8) & 0x7f, // addend (sleb128) - }; - unsigned CFIIndex = - MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, CFIInst)); - BuildMI(MBB, MI, DL, TII.get(AArch64::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlag(MachineInstr::FrameSetup); + if (!MF.getFunction().hasFnAttribute(Attribute::NoUnwind)) { + // Emit a CFI instruction that causes 8 to be subtracted from the value of + // x18 when unwinding past this frame. + static const char CFIInst[] = { + dwarf::DW_CFA_val_expression, + 18, // register + 2, // length + static_cast(unsigned(dwarf::DW_OP_breg18)), + static_cast(-8) & 0x7f, // addend (sleb128) + }; + unsigned CFIIndex = + MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, CFIInst)); + BuildMI(MBB, MI, DL, TII.get(AArch64::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex) + .setMIFlag(MachineInstr::FrameSetup); + } // This instruction also makes x18 live-in to the entry block. MBB.addLiveIn(AArch64::X18); diff --git a/llvm/test/CodeGen/AArch64/shadow-call-stack.ll b/llvm/test/CodeGen/AArch64/shadow-call-stack.ll index 7ec1d639614b..060d81b7fc21 100644 --- a/llvm/test/CodeGen/AArch64/shadow-call-stack.ll +++ b/llvm/test/CodeGen/AArch64/shadow-call-stack.ll @@ -46,3 +46,11 @@ define i32 @f4() shadowcallstack { ; CHECK: ret ret i32 %res1234 } + +define i32 @f5() shadowcallstack nounwind { + ; CHECK: f5: + ; CHECK-NOT: .cfi_escape + %res = call i32 @bar() + %res1 = add i32 %res, 1 + ret i32 %res +}