forked from OSchip/llvm-project
[x86] add tests for setcc eq/ne 0/-1 of rotate; NFC
The tests are adapted from a similar file for instcombine:
fd807601a7
This commit is contained in:
Sanjay Patel
parent
2b46417aa2
commit
35de5125cc
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@ -0,0 +1,231 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
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declare i8 @llvm.fshl.i8(i8, i8, i8)
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declare i32 @llvm.fshl.i32(i32, i32, i32)
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declare i16 @llvm.fshr.i16(i16, i16, i16)
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declare i64 @llvm.fshr.i64(i64, i64, i64)
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declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
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declare void @use16(i16)
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declare void @use32(i32)
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define i1 @rotl_eq_0(i8 %x, i8 %y) nounwind {
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; CHECK-LABEL: rotl_eq_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: rolb %cl, %dil
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; CHECK-NEXT: testb %dil, %dil
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%rot = tail call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 %y)
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%r = icmp eq i8 %rot, 0
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ret i1 %r
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}
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; Extra use is ok.
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define i1 @rotl_ne_0(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: rotl_ne_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: movl %edi, %ebx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: roll %cl, %ebx
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: callq use32@PLT
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; CHECK-NEXT: testl %ebx, %ebx
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%rot = tail call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 %y)
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call void @use32(i32 %rot)
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%r = icmp ne i32 %rot, 0
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ret i1 %r
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}
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define i1 @rotl_eq_n1(i8 %x, i8 %y) nounwind {
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; CHECK-LABEL: rotl_eq_n1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: rolb %cl, %dil
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; CHECK-NEXT: cmpb $-1, %dil
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%rot = tail call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 %y)
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%r = icmp eq i8 %rot, -1
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ret i1 %r
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}
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; Vectors work too.
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define <4 x i1> @rotl_ne_n1(<4 x i32> %x, <4 x i32> %y) nounwind {
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; CHECK-LABEL: rotl_ne_n1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: pslld $23, %xmm1
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; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: cvttps2dq %xmm1, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm1, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm2, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: por %xmm3, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%rot = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32>%x, <4 x i32> %x, <4 x i32> %y)
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%r = icmp ne <4 x i32> %rot, <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i1> %r
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}
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define <4 x i1> @rotl_ne_n1_undef(<4 x i32> %x, <4 x i32> %y) nounwind {
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; CHECK-LABEL: rotl_ne_n1_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: pslld $23, %xmm1
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; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: cvttps2dq %xmm1, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm1, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm2, %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: por %xmm3, %xmm0
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
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; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-NEXT: pxor %xmm1, %xmm0
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; CHECK-NEXT: retq
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%rot = tail call <4 x i32> @llvm.fshl.v4i32(<4 x i32>%x, <4 x i32> %x, <4 x i32> %y)
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%r = icmp ne <4 x i32> %rot, <i32 -1, i32 undef, i32 -1, i32 -1>
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ret <4 x i1> %r
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}
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define i1 @rotr_eq_0(i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: rotr_eq_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: movl %edi, %ebx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: rorw %cl, %bx
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; CHECK-NEXT: movl %ebx, %edi
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; CHECK-NEXT: callq use16@PLT
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; CHECK-NEXT: testw %bx, %bx
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%rot = tail call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 %y)
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call void @use16(i16 %rot)
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%r = icmp eq i16 %rot, 0
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ret i1 %r
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}
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define i1 @rotr_ne_0(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: rotr_ne_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rsi, %rcx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
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; CHECK-NEXT: rorq %cl, %rdi
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%rot = tail call i64 @llvm.fshr.i64(i64 %x, i64 %x, i64 %y)
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%r = icmp ne i64 %rot, 0
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ret i1 %r
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}
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define i1 @rotr_eq_n1(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: rotr_eq_n1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rsi, %rcx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
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; CHECK-NEXT: rorq %cl, %rdi
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; CHECK-NEXT: cmpq $-1, %rdi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%rot = tail call i64 @llvm.fshr.i64(i64 %x, i64 %x, i64 %y)
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%r = icmp eq i64 %rot, -1
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ret i1 %r
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}
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define i1 @rotr_ne_n1(i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: rotr_ne_n1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: rorw %cl, %di
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; CHECK-NEXT: cmpw $-1, %di
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%rot = tail call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 %y)
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%r = icmp ne i16 %rot, -1
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ret i1 %r
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}
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; negative test - wrong constant value
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define i1 @rotr_ne_1(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: rotr_ne_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rsi, %rcx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
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; CHECK-NEXT: rorq %cl, %rdi
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; CHECK-NEXT: cmpq $1, %rdi
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%rot = tail call i64 @llvm.fshr.i64(i64 %x, i64 %x, i64 %y)
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%r = icmp ne i64 %rot, 1
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ret i1 %r
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}
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; negative test - wrong predicate
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define i1 @rotr_sgt_n1(i16 %x, i16 %y) nounwind {
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; CHECK-LABEL: rotr_sgt_n1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: rorw %cl, %di
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; CHECK-NEXT: testw %di, %di
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; CHECK-NEXT: setns %al
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; CHECK-NEXT: retq
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%rot = tail call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 %y)
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%r = icmp sgt i16 %rot, -1
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ret i1 %r
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}
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; negative test - must be a rotate, not general funnel shift
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define i1 @fshl_sgt_n1(i8 %x, i8 %y, i8 %z) nounwind {
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; CHECK-LABEL: fshl_sgt_n1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shll $8, %edi
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; CHECK-NEXT: movzbl %sil, %eax
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; CHECK-NEXT: orl %edi, %eax
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; CHECK-NEXT: andb $7, %cl
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; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
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; CHECK-NEXT: shll %cl, %eax
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; CHECK-NEXT: shrl $8, %eax
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; CHECK-NEXT: cmpb $-1, %al
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%fsh = tail call i8 @llvm.fshl.i8(i8 %x, i8 %y, i8 %z)
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%r = icmp eq i8 %fsh, -1
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ret i1 %r
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}
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