maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Pull out VectorNumElements value. NFC. 

llvm-svn: 309719
This commit is contained in:
Nirav Dave 2017-08-01 18:19:56 +00:00
parent f0a5d09b8d
commit 35dd1ac29c
1 changed files with 9 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -12677,6 +12677,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
EVT MemVT = St->getMemoryVT();
int64_t ElementSizeBytes = MemVT.getSizeInBits() / 8;
unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1;
if (MemVT.getSizeInBits() * 2 > MaximumLegalStoreInBits)
return false;
@ -12834,11 +12835,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
TLI.storeOfVectorConstantIsCheap(MemVT, i + 1, FirstStoreAS)) &&
!NoVectors) {
// Find a legal type for the vector store.
unsigned Elts = i + 1;
if (MemVT.isVector()) {
// When merging vector stores, get the total number of elements.
Elts *= MemVT.getVectorNumElements();
}
unsigned Elts = (i + 1) * NumMemElts;
EVT Ty = EVT::getVectorVT(Context, MemVT.getScalarType(), Elts);
if (TLI.isTypeLegal(Ty) &&
TLI.canMergeStoresTo(FirstStoreAS, Ty, DAG) &&
@ -12877,7 +12874,6 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
unsigned FirstStoreAS = FirstInChain->getAddressSpace();
unsigned FirstStoreAlign = FirstInChain->getAlignment();
unsigned NumStoresToMerge = 1;
bool IsVec = MemVT.isVector();
for (unsigned i = 0; i < NumConsecutiveStores; ++i) {
StoreSDNode *St = cast<StoreSDNode>(StoreNodes[i].MemNode);
unsigned StoreValOpcode = St->getValue().getOpcode();
@ -12891,11 +12887,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
return RV;
// Find a legal type for the vector store.
unsigned Elts = i + 1;
if (IsVec) {
// When merging vector stores, get the total number of elements.
Elts *= MemVT.getVectorNumElements();
}
unsigned Elts = (i + 1) * NumMemElts;
EVT Ty =
EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(), Elts);
bool IsFast;
@ -13010,7 +13002,9 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
isDereferenceable = false;
// Find a legal type for the vector store.
EVT StoreTy = EVT::getVectorVT(Context, MemVT, i + 1);
unsigned Elts = (i + 1) * NumMemElts;
EVT StoreTy = EVT::getVectorVT(Context, MemVT.getScalarType(), Elts);
bool IsFastSt, IsFastLd;
if (TLI.isTypeLegal(StoreTy) &&
TLI.canMergeStoresTo(FirstStoreAS, StoreTy, DAG) &&
@ -13079,7 +13073,9 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode *St) {
// to memory.
EVT JointMemOpVT;
if (UseVectorTy) {
JointMemOpVT = EVT::getVectorVT(Context, MemVT, NumElem);
// Find a legal type for the vector store.
unsigned Elts = NumElem * NumMemElts;
JointMemOpVT = EVT::getVectorVT(Context, MemVT.getScalarType(), Elts);
} else {
unsigned SizeInBits = NumElem * ElementSizeBytes * 8;
JointMemOpVT = EVT::getIntegerVT(Context, SizeInBits);