forked from OSchip/llvm-project
Added DAG combiner transformation to generate pre-indexed loads.
llvm-svn: 31410
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c176f038b9
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@ -174,6 +174,114 @@ namespace {
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return true;
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}
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bool CombineToIndexedLoadStore(SDNode *N) {
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SDOperand Ptr;
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bool isLoad = true;
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if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
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Ptr = LD->getBasePtr();
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} else
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return false;
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if (AfterLegalize &&
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(Ptr.getOpcode() == ISD::ADD || Ptr.getOpcode() == ISD::SUB) &&
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Ptr.Val->use_size() > 1) {
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SDOperand BasePtr;
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SDOperand Offset;
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ISD::MemOpAddrMode AM = ISD::UNINDEXED;
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if (TLI.getLegalPreIndexedAddressBase(N, BasePtr, Offset, AM, DAG)) {
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// Try turning it into a pre-indexed load / store except when
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// 1) Another use of base ptr is a predecessor of N. If ptr is folded
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// that would create a cycle.
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// 2) All uses are load / store ops that use it as base ptr and offset
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// is just an addressing mode immediate.
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// 3) If the would-be new base may not to be dead at N. FIXME: The
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// proper check is too expensive (in turns of compile time) to
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// check. Just make sure other uses of the new base are not also
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// themselves use of loads / stores.
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bool OffIsAMImm = Offset.getOpcode() == ISD::Constant &&
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TLI.isLegalAddressImmediate(cast<ConstantSDNode>(Offset)->getValue());
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// Check for #3.
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if (OffIsAMImm && BasePtr.Val->use_size() > 1) {
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for (SDNode::use_iterator I = BasePtr.Val->use_begin(),
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E = BasePtr.Val->use_end(); I != E; ++I) {
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SDNode *Use = *I;
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if (Use == Ptr.Val)
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continue;
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if (Use->getOpcode() == ISD::ADD || Use->getOpcode() == ISD::SUB) {
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for (SDNode::use_iterator II = Use->use_begin(),
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EE = Use->use_end(); II != EE; ++II) {
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SDNode *UseUse = *II;
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if (UseUse->getOpcode() == ISD::LOAD &&
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cast<LoadSDNode>(UseUse)->getBasePtr().Val == Use)
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return false;
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else if (UseUse->getOpcode() == ISD::STORE &&
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cast<StoreSDNode>(UseUse)->getBasePtr().Val == Use)
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return false;
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}
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}
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}
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}
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// Now check for #1 and #2.
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unsigned NumRealUses = 0;
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for (SDNode::use_iterator I = Ptr.Val->use_begin(),
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E = Ptr.Val->use_end(); I != E; ++I) {
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SDNode *Use = *I;
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if (Use == N)
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continue;
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if (Use->isPredecessor(N))
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return false;
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if (!OffIsAMImm)
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NumRealUses++;
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// FIXME: Do we need a target hook here
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else if (Use->getOpcode() == ISD::LOAD) {
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if (cast<LoadSDNode>(Use)->getBasePtr().Val != Ptr.Val)
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NumRealUses++;
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} else if (Use->getOpcode() == ISD::STORE) {
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if (cast<StoreSDNode>(Use)->getBasePtr().Val != Ptr.Val)
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NumRealUses++;
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} else
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NumRealUses++;
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}
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if (NumRealUses == 0)
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return false;
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SDOperand Result =
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DAG.getIndexedLoad(SDOperand(N,0), BasePtr, Offset, AM);
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++NodesCombined;
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DEBUG(std::cerr << "\nReplacing.4 "; N->dump();
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std::cerr << "\nWith: "; Result.Val->dump(&DAG);
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std::cerr << '\n');
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std::vector<SDNode*> NowDead;
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(0),
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NowDead);
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DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), Result.getValue(2),
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NowDead);
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// Nodes can end up on the worklist more than once. Make sure we do
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// not process a node that has been replaced.
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for (unsigned i = 0, e = NowDead.size(); i != e; ++i)
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removeFromWorkList(NowDead[i]);
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// Finally, since the node is now dead, remove it from the graph.
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DAG.DeleteNode(N);
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// Replace the uses of Ptr with uses of the updated base value.
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DAG.ReplaceAllUsesOfValueWith(Ptr, Result.getValue(1), NowDead);
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removeFromWorkList(Ptr.Val);
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for (unsigned i = 0, e = NowDead.size(); i != e; ++i)
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removeFromWorkList(NowDead[i]);
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DAG.DeleteNode(Ptr.Val);
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return true;
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}
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}
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return false;
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}
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/// visit - call the node-specific routine that knows how to fold each
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/// particular type of node.
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SDOperand visit(SDNode *N);
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@ -2752,6 +2860,10 @@ SDOperand DAGCombiner::visitLOAD(SDNode *N) {
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}
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}
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// Try transforming N to an indexed load.
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if (CombineToIndexedLoadStore(N))
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return SDOperand(N, 0);
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return SDOperand();
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}
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