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Pre-commit test cases for (sra (load)) -> (sextload) folds. NFC
Add test case to show missing folds for (sra (load)) -> (sextload). Differential Revision: https://reviews.llvm.org/D116929
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
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; FIXME: fold (sra (load i32), 16)) -> (sextload i16)
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define i32 @sra_half(i32* %p) {
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; CHECK-LABEL: sra_half:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: sarl $16, %eax
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; CHECK-NEXT: retq
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%load = load i32, i32* %p
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%shift = ashr i32 %load, 16
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ret i32 %shift
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}
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; Vector version not folded.
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define <4 x i32> @sra_half_vec(<4 x i32>* %p) {
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; CHECK-LABEL: sra_half_vec:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movdqa (%rdi), %xmm0
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; CHECK-NEXT: psrad $16, %xmm0
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; CHECK-NEXT: retq
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%load = load <4 x i32>, <4 x i32>* %p
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%shift = ashr <4 x i32> %load, <i32 16, i32 16, i32 16, i32 16>
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ret <4 x i32> %shift
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}
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; FIXME: fold (sra (load i64), 48)) -> (sextload i16)
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define i64 @sra_large_shift(i64* %r) {
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; CHECK-LABEL: sra_large_shift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: sarq $48, %rax
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; CHECK-NEXT: retq
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%t0 = load i64, i64* %r
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%conv = ashr i64 %t0, 48
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ret i64 %conv
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}
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; Negative test, no fold expected.
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define i32 @sra_small_shift(i32* %p) {
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; CHECK-LABEL: sra_small_shift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: sarl $8, %eax
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; CHECK-NEXT: retq
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%load = load i32, i32* %p
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%shift = ashr i32 %load, 8
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ret i32 %shift
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}
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; This should be folded to a zextload.
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define i32 @sra_of_zextload(i16* %p) {
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; CHECK-LABEL: sra_of_zextload:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzbl 1(%rdi), %eax
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; CHECK-NEXT: retq
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%load = load i16, i16* %p
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%zext = zext i16 %load to i32
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%shift = ashr i32 %zext, 8
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ret i32 %shift
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}
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; FIXME: fold (sra (sextload i16 to i32), 8) -> (sextload i8)
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define i32 @sra_of_sextload(i16* %p) {
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; CHECK-LABEL: sra_of_sextload:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movswl (%rdi), %eax
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; CHECK-NEXT: sarl $8, %eax
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; CHECK-NEXT: retq
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%load = load i16, i16* %p
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%sext = sext i16 %load to i32
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%shift = ashr i32 %sext, 8
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ret i32 %shift
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}
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; Negative test. If the shift amount is larger than the memory type then
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; we're not accessing any of the loaded bytes (only the extended bits). So the
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; shift is expected to remain.
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define i32 @sra_of_sextload_no_fold(i16* %p) {
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; CHECK-LABEL: sra_of_sextload_no_fold:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movswl (%rdi), %eax
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; CHECK-NEXT: sarl $16, %eax
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; CHECK-NEXT: retq
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%load = load i16, i16* %p
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%sext = sext i16 %load to i32
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%shift = ashr i32 %sext, 16
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ret i32 %shift
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}
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; FIXME: Fold even if SRA has multiple uses.
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define i32 @sra_to_sextload_multiple_sra_uses(i32* %p) {
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; CHECK-LABEL: sra_to_sextload_multiple_sra_uses:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rdi), %ecx
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; CHECK-NEXT: sarl $16, %ecx
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: xorl $6, %eax
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: retq
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%load = load i32, i32* %p
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%shift = ashr i32 %load, 16
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%use1 = xor i32 %shift, 6
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%use2 = or i32 %shift, %use1
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ret i32 %use2
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}
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