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[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler (Reapplied) 

Recommit rL367100 which was reverted at rL367141. Until PR42777 is fixed, we no longer get the benefits of peeking through bitcasts but it does still remove a GetDemandedBits user and gives us the equivalent combines.

llvm-svn: 367172
This commit is contained in:
Simon Pilgrim 2019-07-27 13:30:29 +00:00
parent 8a52671782
commit 353a848473
1 changed files with 12 additions and 9 deletions
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21
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -34381,6 +34381,18 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
if (SimplifyDemandedBits(RHS, DemandedMask, OriginalDemandedElts, KnownOp,
TLO, Depth + 1))
return true;
// Aggressively peek through ops to get at the demanded low bits.
SDValue DemandedLHS = SimplifyMultipleUseDemandedBits(
LHS, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1);
SDValue DemandedRHS = SimplifyMultipleUseDemandedBits(
RHS, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1);
if (DemandedLHS || DemandedRHS) {
DemandedLHS = DemandedLHS ? DemandedLHS : LHS;
DemandedRHS = DemandedRHS ? DemandedRHS : RHS;
return TLO.CombineTo(
Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, DemandedLHS, DemandedRHS));
}
break;
}
case X86ISD::VSHLI: {
@ -44220,15 +44232,6 @@ static SDValue combinePMULDQ(SDNode *N, SelectionDAG &DAG,
if (ISD::isBuildVectorAllZeros(RHS.getNode()))
return RHS;
// Aggressively peek through ops to get at the demanded low bits.
APInt DemandedMask = APInt::getLowBitsSet(64, 32);
SDValue DemandedLHS = DAG.GetDemandedBits(LHS, DemandedMask);
SDValue DemandedRHS = DAG.GetDemandedBits(RHS, DemandedMask);
if (DemandedLHS || DemandedRHS)
return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
DemandedLHS ? DemandedLHS : LHS,
DemandedRHS ? DemandedRHS : RHS);
// PMULDQ/PMULUDQ only uses lower 32 bits from each vector element.
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (TLI.SimplifyDemandedBits(SDValue(N, 0), APInt::getAllOnesValue(64), DCI))