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[X86][SSE] getTargetShuffleMaskIndices - allow opt-in support for whole undef shuffle mask elements 

Enable this for PSHUFB constant mask decoding and remove the ConstantPool DecodePSHUFBMask

llvm-svn: 344931
This commit is contained in:
Simon Pilgrim 2018-10-22 18:09:02 +00:00
parent 279f8a44a1
commit 3521367ff3
1 changed files with 9 additions and 10 deletions
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19
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -5839,20 +5839,23 @@ static bool isConstantSplat(SDValue Op, APInt &SplatVal) {
static bool getTargetShuffleMaskIndices(SDValue MaskNode,
unsigned MaskEltSizeInBits,
SmallVectorImpl<uint64_t> &RawMask) {
SmallVectorImpl<uint64_t> &RawMask,
bool AllowWholeUndefs = false) {
APInt UndefElts;
SmallVector<APInt, 64> EltBits;
// Extract the raw target constant bits.
// FIXME: We currently don't support UNDEF bits or mask entries.
if (!getTargetConstantBitsFromNode(MaskNode, MaskEltSizeInBits, UndefElts,
EltBits, /* AllowWholeUndefs */ false,
EltBits, AllowWholeUndefs,
/* AllowPartialUndefs */ false))
return false;
// Insert the extracted elements into the mask.
for (APInt Elt : EltBits)
RawMask.push_back(Elt.getZExtValue());
for (int i = 0, e = EltBits.size(); i != e; ++i) {
uint64_t M = AllowWholeUndefs && UndefElts[i] ? SM_SentinelUndef
: EltBits[i].getZExtValue();
RawMask.push_back(M);
}
return true;
}
@ -6057,14 +6060,10 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
IsUnary = true;
SDValue MaskNode = N->getOperand(1);
SmallVector<uint64_t, 32> RawMask;
if (getTargetShuffleMaskIndices(MaskNode, 8, RawMask)) {
if (getTargetShuffleMaskIndices(MaskNode, 8, RawMask, true)) {
DecodePSHUFBMask(RawMask, Mask);
break;
}
if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodePSHUFBMask(C, Mask);
break;
}
return false;
}
case X86ISD::VPERMI: