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[ARM] Remove FeaturePerfMon from armv7-m 

FeaturePerfMon relates to the PMU extensions available in armv7-a, and
should not be available in v7-m (it requires loading from a system
register with a mrc). Sink it down a level in the dependency map so that
it isn't present in ARMv7m or HasV8MMainlineOps.

It is also removed from the Neoverse-N2, as it will already be
transitively included.

Differential Revision: https://reviews.llvm.org/D117022
This commit is contained in:
David Green 2022-01-12 09:44:53 +00:00
parent 253ce92844
commit 351edf1c47
2 changed files with 10 additions and 8 deletions
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17
llvm/lib/Target/ARM/ARM.td
View File

@ -512,8 +512,7 @@ def HasV6T2Ops : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true",
"Support ARM v7 instructions", "Support ARM v7 instructions",
[HasV6T2Ops, FeaturePerfMon, [HasV6T2Ops, FeatureV7Clrex]>;
FeatureV7Clrex]>;
def HasV8MMainlineOps : def HasV8MMainlineOps :
SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true", SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true",
@ -522,7 +521,7 @@ def HasV8MMainlineOps :
def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true", def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true",
"Support ARM v8 instructions", "Support ARM v8 instructions",
[HasV7Ops, FeatureAcquireRelease]>; [HasV7Ops, FeaturePerfMon, FeatureAcquireRelease]>;
def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true", def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
"Support ARM v8.1a instructions", "Support ARM v8.1a instructions",
@ -765,7 +764,8 @@ def ARMv7a : Architecture<"armv7-a", "ARMv7a", [HasV7Ops,
FeatureNEON, FeatureNEON,
FeatureDB, FeatureDB,
FeatureDSP, FeatureDSP,
FeatureAClass]>; FeatureAClass,
FeaturePerfMon]>;
def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops, def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops,
FeatureNEON, FeatureNEON,
@ -774,13 +774,15 @@ def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops,
FeatureTrustZone, FeatureTrustZone,
FeatureMP, FeatureMP,
FeatureVirtualization, FeatureVirtualization,
FeatureAClass]>; FeatureAClass,
FeaturePerfMon]>;
def ARMv7r : Architecture<"armv7-r", "ARMv7r", [HasV7Ops, def ARMv7r : Architecture<"armv7-r", "ARMv7r", [HasV7Ops,
FeatureDB, FeatureDB,
FeatureDSP, FeatureDSP,
FeatureHWDivThumb, FeatureHWDivThumb,
FeatureRClass]>; FeatureRClass,
FeaturePerfMon]>;
def ARMv7m : Architecture<"armv7-m", "ARMv7m", [HasV7Ops, def ARMv7m : Architecture<"armv7-m", "ARMv7m", [HasV7Ops,
FeatureThumb2, FeatureThumb2,
@ -1459,8 +1461,7 @@ def : ProcNoItin<"neoverse-n1", [ARMv82a,
def : ProcNoItin<"neoverse-n2", [ARMv85a, def : ProcNoItin<"neoverse-n2", [ARMv85a,
FeatureBF16, FeatureBF16,
FeatureMatMulInt8, FeatureMatMulInt8]>;
FeaturePerfMon]>;
def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift, def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
FeatureHasRetAddrStack, FeatureHasRetAddrStack,

1
llvm/test/CodeGen/ARM/readcyclecounter.ll
View File

@ -1,6 +1,7 @@
; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s ; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s
; RUN: llc -mtriple=thumbv7-none-linux-gnueabi < %s | FileCheck %s ; RUN: llc -mtriple=thumbv7-none-linux-gnueabi < %s | FileCheck %s
; RUN: llc -mtriple=armv7-none-linux-gnueabi -mattr=-perfmon < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON ; RUN: llc -mtriple=armv7-none-linux-gnueabi -mattr=-perfmon < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON
; RUN: llc -mtriple=armv7m-none-linux-gnueabi < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON
; RUN: llc -mtriple=armv6-none-linux-gnueabi < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON ; RUN: llc -mtriple=armv6-none-linux-gnueabi < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON
; The performance monitor we're looking for is an ARMv7 extension. It should be ; The performance monitor we're looking for is an ARMv7 extension. It should be