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[mips] Guard more aliases correctly. 

Also, duplicate an alias for microMIPS.

llvm-svn: 333741
This commit is contained in:
Simon Dardis 2018-06-01 10:57:13 +00:00
parent f4df554f32
commit 351aa594f6
2 changed files with 56 additions and 48 deletions
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3
llvm/lib/Target/Mips/MicroMipsInstrInfo.td
View File

@ -1377,6 +1377,9 @@ let Predicates = [InMicroMips] in {
ISA_MICROMIPS;
def : MipsInstAlias<"bal $offset", (BGEZAL_MM ZERO, brtarget_mm:$offset), 1>,
ISA_MICROMIPS32_NOT_MIPS32R6;
def : MipsInstAlias<"j $rs", (JR_MM GPR32Opnd:$rs), 0>,
ISA_MICROMIPS32_NOT_MIPS32R6;
}
def : MipsInstAlias<"hypcall", (HYPCALL_MM 0), 1>,
ISA_MICROMIPS32R5, ASE_VIRT;

101
llvm/lib/Target/Mips/MipsInstrInfo.td
View File

@ -2592,52 +2592,50 @@ multiclass OneOrTwoOperandMacroImmediateAlias<string Memnomic,
Imm:$imm), 0>;
}
def : MipsInstAlias<"move $dst, $src",
(OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>,
GPR_32 {
let AdditionalPredicates = [NotInMicroMips];
}
def : MipsInstAlias<"move $dst, $src",
(ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>,
GPR_32 {
let AdditionalPredicates = [NotInMicroMips];
}
def : MipsInstAlias<"bal $offset", (BGEZAL ZERO, brtarget:$offset), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"j $rs", (JR GPR32Opnd:$rs), 0>;
let Predicates = [NotInMicroMips] in {
def : MipsInstAlias<"jalr $rs", (JALR RA, GPR32Opnd:$rs), 0>;
}
def : MipsInstAlias<"jalr.hb $rs", (JALR_HB RA, GPR32Opnd:$rs), 1>,
ISA_MIPS32;
let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"move $dst, $src",
(OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>,
GPR_32, ISA_MIPS1;
def : MipsInstAlias<"move $dst, $src",
(ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>,
GPR_32, ISA_MIPS1;
def : MipsInstAlias<"bal $offset", (BGEZAL ZERO, brtarget:$offset), 1>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"j $rs", (JR GPR32Opnd:$rs), 0>, ISA_MIPS1;
def : MipsInstAlias<"jalr $rs", (JALR RA, GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"jalr.hb $rs", (JALR_HB RA, GPR32Opnd:$rs), 1>,
ISA_MIPS32;
def : MipsInstAlias<"neg $rt, $rs",
(SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs), 1>;
(SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs), 1>, ISA_MIPS1;
def : MipsInstAlias<"neg $rt",
(SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt), 1>;
(SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt), 1>, ISA_MIPS1;
def : MipsInstAlias<"negu $rt, $rs",
(SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs), 1>;
(SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs), 1>, ISA_MIPS1;
def : MipsInstAlias<"negu $rt",
(SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt), 1>;
(SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt), 1>, ISA_MIPS1;
def : MipsInstAlias<
"sgt $rd, $rs, $rt",
(SLT GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
(SLT GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>, ISA_MIPS1;
def : MipsInstAlias<
"sgt $rs, $rt",
(SLT GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
(SLT GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>, ISA_MIPS1;
def : MipsInstAlias<
"sgtu $rd, $rs, $rt",
(SLTu GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
(SLTu GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>, ISA_MIPS1;
def : MipsInstAlias<
"sgtu $$rs, $rt",
(SLTu GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
(SLTu GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>, ISA_MIPS1;
def : MipsInstAlias<
"not $rt, $rs",
(NOR GPR32Opnd:$rt, GPR32Opnd:$rs, ZERO), 0>;
(NOR GPR32Opnd:$rt, GPR32Opnd:$rs, ZERO), 0>, ISA_MIPS1;
def : MipsInstAlias<
"not $rt",
(NOR GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>;
(NOR GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>, ISA_MIPS1;
def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>, ISA_MIPS1;
@ -2654,10 +2652,7 @@ let AdditionalPredicates = [NotInMicroMips] in {
defm : OneOrTwoOperandMacroImmediateAlias<"slt", SLTi>, ISA_MIPS1, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"sltu", SLTiu>, ISA_MIPS1, GPR_32;
}
def : MipsInstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>;
def : MipsInstAlias<"mtc0 $rt, $rd", (MTC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>;
let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"mfgc0 $rt, $rd",
(MFGC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>,
ISA_MIPS32R5, ASE_VIRT;
@ -2670,21 +2665,31 @@ let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"mthgc0 $rt, $rd",
(MTHGC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>,
ISA_MIPS32R5, ASE_VIRT;
}
def : MipsInstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, COP2Opnd:$rd, 0), 0>;
def : MipsInstAlias<"mtc2 $rt, $rd", (MTC2 COP2Opnd:$rd, GPR32Opnd:$rt, 0), 0>;
let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"b $offset", (BEQ ZERO, ZERO, brtarget:$offset), 0>;
}
def : MipsInstAlias<"bnez $rs,$offset",
(BNE GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>;
def : MipsInstAlias<"bnezl $rs,$offset",
(BNEL GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>;
def : MipsInstAlias<"beqz $rs,$offset",
(BEQ GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>;
def : MipsInstAlias<"beqzl $rs,$offset",
(BEQL GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>;
let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>,
ISA_MIPS1;
def : MipsInstAlias<"mtc0 $rt, $rd", (MTC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>,
ISA_MIPS1;
def : MipsInstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, COP2Opnd:$rd, 0), 0>,
ISA_MIPS1;
def : MipsInstAlias<"mtc2 $rt, $rd", (MTC2 COP2Opnd:$rd, GPR32Opnd:$rt, 0), 0>,
ISA_MIPS1;
def : MipsInstAlias<"b $offset", (BEQ ZERO, ZERO, brtarget:$offset), 0>,
ISA_MIPS1;
def : MipsInstAlias<"bnez $rs,$offset",
(BNE GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>,
ISA_MIPS1;
def : MipsInstAlias<"bnezl $rs,$offset",
(BNEL GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>,
ISA_MIPS2;
def : MipsInstAlias<"beqz $rs,$offset",
(BEQ GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>,
ISA_MIPS1;
def : MipsInstAlias<"beqzl $rs,$offset",
(BEQL GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>,
ISA_MIPS2;
def : MipsInstAlias<"syscall", (SYSCALL 0), 1>, ISA_MIPS1;
def : MipsInstAlias<"break", (BREAK 0, 0), 1>, ISA_MIPS1;