forked from OSchip/llvm-project
Reland "[WebAssembly] Handle multiple loads of splatted loads"
This reverts commit 92a25fbf11
and fixes
the ambiguous method call that was causing build failures.
This commit is contained in:
parent
b9903ec897
commit
3479fd25b9
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@ -30,9 +30,9 @@ HANDLE_NODETYPE(SWIZZLE)
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HANDLE_NODETYPE(VEC_SHL)
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HANDLE_NODETYPE(VEC_SHR_S)
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HANDLE_NODETYPE(VEC_SHR_U)
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HANDLE_NODETYPE(LOAD_SPLAT)
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HANDLE_NODETYPE(THROW)
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HANDLE_NODETYPE(MEMORY_COPY)
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HANDLE_NODETYPE(MEMORY_FILL)
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// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
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// Memory intrinsics
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HANDLE_MEM_NODETYPE(LOAD_SPLAT)
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@ -461,11 +461,14 @@ const char *
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WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
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case WebAssemblyISD::FIRST_NUMBER:
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case WebAssemblyISD::FIRST_MEM_OPCODE:
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break;
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#define HANDLE_NODETYPE(NODE) \
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case WebAssemblyISD::NODE: \
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return "WebAssemblyISD::" #NODE;
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#define HANDLE_MEM_NODETYPE(NODE) HANDLE_NODETYPE(NODE)
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#include "WebAssemblyISD.def"
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#undef HANDLE_MEM_NODETYPE
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#undef HANDLE_NODETYPE
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}
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return nullptr;
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@ -1425,7 +1428,11 @@ SDValue WebAssemblyTargetLowering::LowerBUILD_VECTOR(SDValue Op,
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if (Subtarget->hasUnimplementedSIMD128() &&
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(SplattedLoad = dyn_cast<LoadSDNode>(SplatValue)) &&
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SplattedLoad->getMemoryVT() == VecT.getVectorElementType()) {
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Result = DAG.getNode(WebAssemblyISD::LOAD_SPLAT, DL, VecT, SplatValue);
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Result = DAG.getMemIntrinsicNode(
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WebAssemblyISD::LOAD_SPLAT, DL, DAG.getVTList(VecT),
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{SplattedLoad->getChain(), SplattedLoad->getBasePtr(),
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SplattedLoad->getOffset()},
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SplattedLoad->getMemoryVT(), SplattedLoad->getMemOperand());
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} else {
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Result = DAG.getSplatBuildVector(VecT, DL, SplatValue);
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}
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@ -24,8 +24,16 @@ namespace WebAssemblyISD {
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enum NodeType : unsigned {
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
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#define HANDLE_NODETYPE(NODE) NODE,
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#define HANDLE_MEM_NODETYPE(NODE)
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#include "WebAssemblyISD.def"
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FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE,
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#undef HANDLE_NODETYPE
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#undef HANDLE_MEM_NODETYPE
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#define HANDLE_NODETYPE(NODE)
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#define HANDLE_MEM_NODETYPE(NODE) NODE,
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#include "WebAssemblyISD.def"
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#undef HANDLE_NODETYPE
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#undef HANDLE_MEM_NODETYPE
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};
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} // end namespace WebAssemblyISD
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@ -72,35 +72,30 @@ defm "" : SIMDLoadSplat<"v16x8", 195>;
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defm "" : SIMDLoadSplat<"v32x4", 196>;
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defm "" : SIMDLoadSplat<"v64x2", 197>;
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def wasm_load_splat_t : SDTypeProfile<1, 1, []>;
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def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t>;
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foreach args = [["v16i8", "i32", "extloadi8"], ["v8i16", "i32", "extloadi16"],
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["v4i32", "i32", "load"], ["v2i64", "i64", "load"],
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["v4f32", "f32", "load"], ["v2f64", "f64", "load"]] in
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def load_splat_#args[0] :
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PatFrag<(ops node:$addr), (wasm_load_splat
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(!cast<ValueType>(args[1]) (!cast<PatFrag>(args[2]) node:$addr)))>;
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def wasm_load_splat_t : SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>;
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def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t,
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[SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
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def load_splat : PatFrag<(ops node:$addr), (wasm_load_splat node:$addr)>;
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let Predicates = [HasUnimplementedSIMD128] in
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foreach args = [["v16i8", "v8x16"], ["v8i16", "v16x8"], ["v4i32", "v32x4"],
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["v2i64", "v64x2"], ["v4f32", "v32x4"], ["v2f64", "v64x2"]] in {
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def : LoadPatNoOffset<!cast<ValueType>(args[0]),
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!cast<PatFrag>("load_splat_"#args[0]),
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load_splat,
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!cast<NI>("LOAD_SPLAT_"#args[1])>;
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def : LoadPatImmOff<!cast<ValueType>(args[0]),
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!cast<PatFrag>("load_splat_"#args[0]),
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load_splat,
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regPlusImm,
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!cast<NI>("LOAD_SPLAT_"#args[1])>;
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def : LoadPatImmOff<!cast<ValueType>(args[0]),
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!cast<PatFrag>("load_splat_"#args[0]),
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load_splat,
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or_is_add,
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!cast<NI>("LOAD_SPLAT_"#args[1])>;
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def : LoadPatOffsetOnly<!cast<ValueType>(args[0]),
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!cast<PatFrag>("load_splat_"#args[0]),
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load_splat,
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!cast<NI>("LOAD_SPLAT_"#args[1])>;
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def : LoadPatGlobalAddrOffOnly<!cast<ValueType>(args[0]),
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!cast<PatFrag>("load_splat_"#args[0]),
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load_splat,
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!cast<NI>("LOAD_SPLAT_"#args[1])>;
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}
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@ -0,0 +1,21 @@
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; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+unimplemented-simd128 | FileCheck %s
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; Regression test for an ISel failure when a splatted load had more
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; than one use. The main tests for load_splat are in simd-offset.ll.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: load_splat:
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; CHECK-NEXT: .functype load_splat (i32, i32) -> (i32)
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; CHECK-NEXT: i32.load8_u $[[E:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: v8x16.load_splat $push[[V:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: v128.store 0($1), $pop[[V]]{{$}}
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; CHECK-NEXT: return $[[E]]{{$}}
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define i8 @load_splat(i8* %p, <16 x i8>* %out) {
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%e = load i8, i8* %p
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%v1 = insertelement <16 x i8> undef, i8 %e, i32 0
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%v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
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store <16 x i8> %v2, <16 x i8>* %out
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ret i8 %e
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}
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