[X86] Clarify PSHUFB+blend lowering function name. NFC.

Also guard against v32i8 users.

llvm-svn: 271024
This commit is contained in:
Ahmed Bougacha 2016-05-27 17:58:17 +00:00
parent 655c2deaf6
commit 346b98011c
1 changed files with 11 additions and 9 deletions

View File

@ -9637,11 +9637,13 @@ static SDValue lowerV8I16GeneralSingleInputVectorShuffle(
return V;
}
/// \brief Helper to form a PSHUFB-based shuffle+blend.
static SDValue lowerVectorShuffleAsPSHUFB(SDLoc DL, MVT VT, SDValue V1,
SDValue V2, ArrayRef<int> Mask,
SelectionDAG &DAG, bool &V1InUse,
bool &V2InUse) {
/// Helper to form a PSHUFB-based shuffle+blend, opportunistically avoiding the
/// blend if only one input is used.
static SDValue
lowerVectorShuffleAsBlendOfPSHUFBs(SDLoc DL, MVT VT, SDValue V1, SDValue V2,
ArrayRef<int> Mask, SelectionDAG &DAG,
bool &V1InUse, bool &V2InUse) {
assert(VT.is128BitVector() && "v32i8 VPSHUFB blend not implemented yet!");
SmallBitVector Zeroable = computeZeroableShuffleElements(Mask, V1, V2);
SDValue V1Mask[16];
SDValue V2Mask[16];
@ -9807,8 +9809,8 @@ static SDValue lowerV8I16VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
// can both shuffle and set up the inefficient blend.
if (!IsBlendSupported && Subtarget.hasSSSE3()) {
bool V1InUse, V2InUse;
return lowerVectorShuffleAsPSHUFB(DL, MVT::v8i16, V1, V2, Mask, DAG,
V1InUse, V2InUse);
return lowerVectorShuffleAsBlendOfPSHUFBs(DL, MVT::v8i16, V1, V2, Mask, DAG,
V1InUse, V2InUse);
}
// We can always bit-blend if we have to so the fallback strategy is to
@ -10050,8 +10052,8 @@ static SDValue lowerV16I8VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
bool V1InUse = false;
bool V2InUse = false;
SDValue PSHUFB = lowerVectorShuffleAsPSHUFB(DL, MVT::v16i8, V1, V2, Mask,
DAG, V1InUse, V2InUse);
SDValue PSHUFB = lowerVectorShuffleAsBlendOfPSHUFBs(
DL, MVT::v16i8, V1, V2, Mask, DAG, V1InUse, V2InUse);
// If both V1 and V2 are in use and we can use a direct blend or an unpack,
// do so. This avoids using them to handle blends-with-zero which is