forked from OSchip/llvm-project
[X86] Combining CMOVs with [ANY,SIGN,ZERO]_EXTEND for cases where CMOV has constant arguments
Combine CMOV[i16]<-[SIGN,ZERO,ANY]_EXTEND to [i32,i64] into CMOV[i32,i64].
One example of where it is useful is:
before (20 bytes)
<foo>:
test $0x1,%dil
mov $0x307e,%ax
mov $0xffff,%cx
cmovne %ax,%cx
movzwl %cx,%eax
retq
after (18 bytes)
<foo>:
test $0x1,%dil
mov $0x307e,%ecx
mov $0xffff,%eax
cmovne %ecx,%eax
retq
Reviewers: craig.topper, aaboud, spatel, RKSimon, zvi
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36711
llvm-svn: 313982
This commit is contained in:
Alexander Ivchenko
parent
889dc1e3a5
commit
34498ba052
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@ -34491,6 +34491,47 @@ static SDValue getDivRem8(SDNode *N, SelectionDAG &DAG) {
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return R.getValue(1);
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}
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// If we face {ANY,SIGN,ZERO}_EXTEND that is applied to a CMOV with constant
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// operands and the result of CMOV is not used anywhere else - promote CMOV
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// itself instead of promoting its result. This could be beneficial, because:
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// 1) X86TargetLowering::EmitLoweredSelect later can do merging of two
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// (or more) pseudo-CMOVs only when they go one-after-another and
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// getting rid of result extension code after CMOV will help that.
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// 2) Promotion of constant CMOV arguments is free, hence the
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// {ANY,SIGN,ZERO}_EXTEND will just be deleted.
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// 3) 16-bit CMOV encoding is 4 bytes, 32-bit CMOV is 3-byte, so this
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// promotion is also good in terms of code-size.
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// (64-bit CMOV is 4-bytes, that's why we don't do 32-bit => 64-bit
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// promotion).
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static SDValue combineToExtendCMOV(SDNode *Extend, SelectionDAG &DAG) {
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SDValue CMovN = Extend->getOperand(0);
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if (CMovN.getOpcode() != X86ISD::CMOV)
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return SDValue();
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EVT TargetVT = Extend->getValueType(0);
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unsigned ExtendOpcode = Extend->getOpcode();
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SDLoc DL(Extend);
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EVT VT = CMovN.getValueType();
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SDValue CMovOp0 = CMovN.getOperand(0);
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SDValue CMovOp1 = CMovN.getOperand(1);
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bool DoPromoteCMOV =
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(VT == MVT::i16 && (TargetVT == MVT::i32 || TargetVT == MVT::i64)) &&
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CMovN.hasOneUse() &&
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(isa<ConstantSDNode>(CMovOp0.getNode()) &&
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isa<ConstantSDNode>(CMovOp1.getNode()));
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if (!DoPromoteCMOV)
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return SDValue();
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CMovOp0 = DAG.getNode(ExtendOpcode, DL, TargetVT, CMovOp0);
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CMovOp1 = DAG.getNode(ExtendOpcode, DL, TargetVT, CMovOp1);
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return DAG.getNode(X86ISD::CMOV, DL, TargetVT, CMovOp0, CMovOp1,
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CMovN.getOperand(2), CMovN.getOperand(3));
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}
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/// Convert a SEXT or ZEXT of a vector to a SIGN_EXTEND_VECTOR_INREG or
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/// ZERO_EXTEND_VECTOR_INREG, this requires the splitting (or concatenating
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/// with UNDEFs) of the input to vectors of the same size as the target type
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@ -34605,6 +34646,9 @@ static SDValue combineSext(SDNode *N, SelectionDAG &DAG,
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if (SDValue DivRem8 = getDivRem8(N, DAG))
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return DivRem8;
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if (SDValue NewCMov = combineToExtendCMOV(N, DAG))
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return NewCMov;
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if (!DCI.isBeforeLegalizeOps()) {
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if (InVT == MVT::i1) {
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SDValue Zero = DAG.getConstant(0, DL, VT);
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@ -34757,6 +34801,9 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
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}
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}
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if (SDValue NewCMov = combineToExtendCMOV(N, DAG))
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return NewCMov;
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if (SDValue V = combineToExtendVectorInReg(N, DAG, DCI, Subtarget))
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return V;
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@ -90,21 +90,19 @@ define i32 @cmov_zpromotion_16_to_32(i1 %c) {
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; CMOV-LABEL: cmov_zpromotion_16_to_32:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movzwl %cx, %eax
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; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
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; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
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; CMOV-NEXT: cmovnel %ecx, %eax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB3_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
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; NO_CMOV-NEXT: .LBB3_2:
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; NO_CMOV-NEXT: movzwl %ax, %eax
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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%ret = zext i16 %t0 to i32
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@ -115,21 +113,19 @@ define i64 @cmov_zpromotion_16_to_64(i1 %c) {
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; CMOV-LABEL: cmov_zpromotion_16_to_64:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movzwl %cx, %eax
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; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
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; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
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; CMOV-NEXT: cmovneq %rcx, %rax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB4_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
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; NO_CMOV-NEXT: .LBB4_2:
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; NO_CMOV-NEXT: movzwl %ax, %eax
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; NO_CMOV-NEXT: xorl %edx, %edx
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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@ -250,21 +246,19 @@ define i32 @cmov_spromotion_16_to_32(i1 %c) {
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; CMOV-LABEL: cmov_spromotion_16_to_32:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movswl %cx, %eax
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; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
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; CMOV-NEXT: movl $-1, %eax
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; CMOV-NEXT: cmovnel %ecx, %eax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB9_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: movl $-1, %eax
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; NO_CMOV-NEXT: .LBB9_2:
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; NO_CMOV-NEXT: cwtl
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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%ret = sext i16 %t0 to i32
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@ -275,21 +269,19 @@ define i64 @cmov_spromotion_16_to_64(i1 %c) {
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; CMOV-LABEL: cmov_spromotion_16_to_64:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movswq %cx, %rax
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; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
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; CMOV-NEXT: movq $-1, %rax
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; CMOV-NEXT: cmovneq %rcx, %rax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB10_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: movl $-1, %eax
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; NO_CMOV-NEXT: .LBB10_2:
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; NO_CMOV-NEXT: cwtl
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; NO_CMOV-NEXT: movl %eax, %edx
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; NO_CMOV-NEXT: sarl $31, %edx
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; NO_CMOV-NEXT: retl
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@ -39,44 +39,58 @@ define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
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; PR2139
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define i32 @test2() nounwind {
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: callq _return_false
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb $1, %al
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; CHECK-NEXT: movw $-480, %ax ## imm = 0xFE20
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; CHECK-NEXT: cmovnew %cx, %ax
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; CHECK-NEXT: cwtl
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; CHECK-NEXT: shll $3, %eax
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; CHECK-NEXT: cmpl $32768, %eax ## imm = 0x8000
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; CHECK-NEXT: jge LBB1_1
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; CHECK-NEXT: ## BB#2: ## %bb91
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB1_1: ## %bb90
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; CHECK-NEXT: ## -- End function
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; GENERIC-LABEL: test2:
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; GENERIC: ## BB#0: ## %entry
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; GENERIC-NEXT: pushq %rax
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; GENERIC-NEXT: callq _return_false
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; GENERIC-NEXT: xorl %ecx, %ecx
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; GENERIC-NEXT: testb $1, %al
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; GENERIC-NEXT: movl $-480, %eax
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; GENERIC-NEXT: cmovnel %ecx, %eax
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; GENERIC-NEXT: shll $3, %eax
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; GENERIC-NEXT: cmpl $32768, %eax ## imm = 0x8000
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; GENERIC-NEXT: jge LBB1_1
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; GENERIC-NEXT: ## BB#2: ## %bb91
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; GENERIC-NEXT: xorl %eax, %eax
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; GENERIC-NEXT: popq %rcx
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; GENERIC-NEXT: retq
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; GENERIC-NEXT: LBB1_1: ## %bb90
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; GENERIC-NEXT: ## -- End function
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;
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; ATOM-LABEL: test2:
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; ATOM: ## BB#0: ## %entry
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; ATOM-NEXT: pushq %rax
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; ATOM-NEXT: callq _return_false
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; ATOM-NEXT: xorl %ecx, %ecx
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; ATOM-NEXT: movl $-480, %edx
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; ATOM-NEXT: testb $1, %al
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; ATOM-NEXT: cmovnel %ecx, %edx
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; ATOM-NEXT: shll $3, %edx
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; ATOM-NEXT: cmpl $32768, %edx ## imm = 0x8000
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; ATOM-NEXT: jge LBB1_1
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; ATOM-NEXT: ## BB#2: ## %bb91
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; ATOM-NEXT: xorl %eax, %eax
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; ATOM-NEXT: popq %rcx
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; ATOM-NEXT: retq
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; ATOM-NEXT: LBB1_1: ## %bb90
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; ATOM-NEXT: ## -- End function
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;
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; MCU-LABEL: test2:
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; MCU: # BB#0: # %entry
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; MCU-NEXT: calll return_false
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; MCU-NEXT: xorl %ecx, %ecx
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; MCU-NEXT: testb $1, %al
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; MCU-NEXT: jne .LBB1_1
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; MCU-NEXT: # BB#2: # %entry
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; MCU-NEXT: movw $-480, %ax # imm = 0xFE20
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; MCU-NEXT: jmp .LBB1_3
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; MCU-NEXT: .LBB1_1:
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; MCU-NEXT: xorl %eax, %eax
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; MCU-NEXT: .LBB1_3: # %entry
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; MCU-NEXT: cwtl
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; MCU-NEXT: shll $3, %eax
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; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000
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; MCU-NEXT: jge .LBB1_4
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; MCU-NEXT: # BB#5: # %bb91
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; MCU-NEXT: jne .LBB1_2
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; MCU-NEXT: # BB#1: # %entry
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; MCU-NEXT: movl $-480, %ecx # imm = 0xFE20
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; MCU-NEXT: .LBB1_2:
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; MCU-NEXT: shll $3, %ecx
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; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000
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; MCU-NEXT: jge .LBB1_3
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; MCU-NEXT: # BB#4: # %bb91
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; MCU-NEXT: xorl %eax, %eax
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; MCU-NEXT: retl
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; MCU-NEXT: .LBB1_4: # %bb90
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; MCU-NEXT: .LBB1_3: # %bb90
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entry:
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%tmp73 = tail call i1 @return_false()
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%g.0 = select i1 %tmp73, i16 0, i16 -480
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@ -5791,51 +5791,51 @@ define <64 x i1> @test_cmp_v64i16(<64 x i16> %a0, <64 x i16> %a1) nounwind {
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; AVX512BW-NEXT: vpextrw $1, %xmm5, %edx
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; AVX512BW-NEXT: xorl %eax, %eax
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; AVX512BW-NEXT: cmpw %cx, %dx
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; AVX512BW-NEXT: movw $-1, %cx
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; AVX512BW-NEXT: movl $65535, %ecx # imm = 0xFFFF
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
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; AVX512BW-NEXT: vmovd %xmm4, %esi
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; AVX512BW-NEXT: vmovd %xmm5, %edi
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; AVX512BW-NEXT: cmpw %si, %di
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; AVX512BW-NEXT: movl $0, %esi
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; AVX512BW-NEXT: cmovgw %cx, %si
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; AVX512BW-NEXT: cmovgl %ecx, %esi
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; AVX512BW-NEXT: vmovd %esi, %xmm6
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; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm6, %xmm6
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; AVX512BW-NEXT: vpextrw $2, %xmm4, %edx
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; AVX512BW-NEXT: vpextrw $2, %xmm5, %esi
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; AVX512BW-NEXT: cmpw %dx, %si
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
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; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm6, %xmm6
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; AVX512BW-NEXT: vpextrw $3, %xmm4, %edx
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; AVX512BW-NEXT: vpextrw $3, %xmm5, %esi
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; AVX512BW-NEXT: cmpw %dx, %si
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
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; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm6, %xmm6
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; AVX512BW-NEXT: vpextrw $4, %xmm4, %edx
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; AVX512BW-NEXT: vpextrw $4, %xmm5, %esi
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; AVX512BW-NEXT: cmpw %dx, %si
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
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; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm6, %xmm6
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; AVX512BW-NEXT: vpextrw $5, %xmm4, %edx
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; AVX512BW-NEXT: vpextrw $5, %xmm5, %esi
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; AVX512BW-NEXT: cmpw %dx, %si
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
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; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm6, %xmm6
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; AVX512BW-NEXT: vpextrw $6, %xmm4, %edx
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; AVX512BW-NEXT: vpextrw $6, %xmm5, %esi
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; AVX512BW-NEXT: cmpw %dx, %si
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
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; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm6, %xmm6
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; AVX512BW-NEXT: vpextrw $7, %xmm4, %edx
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; AVX512BW-NEXT: vpextrw $7, %xmm5, %esi
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; AVX512BW-NEXT: cmpw %dx, %si
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; AVX512BW-NEXT: movl $0, %edx
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; AVX512BW-NEXT: cmovgw %cx, %dx
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; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm6, %xmm4
|
||||
; AVX512BW-NEXT: vextracti32x4 $2, %zmm2, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $1, %xmm5, %edx
|
||||
|
|
@ -5843,49 +5843,49 @@ define <64 x i1> @test_cmp_v64i16(<64 x i16> %a0, <64 x i16> %a1) nounwind {
|
|||
; AVX512BW-NEXT: vpextrw $1, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm5, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm6, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm7
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm7, %xmm5
|
||||
; AVX512BW-NEXT: vinserti128 $1, %xmm4, %ymm5, %ymm4
|
||||
; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm5
|
||||
|
|
@ -5894,97 +5894,97 @@ define <64 x i1> @test_cmp_v64i16(<64 x i16> %a0, <64 x i16> %a1) nounwind {
|
|||
; AVX512BW-NEXT: vpextrw $1, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm5, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm6, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm7
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm7, %xmm7
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm5, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm6, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm7, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $1, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $1, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm2, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm0, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm6
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm0, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm6, %xmm0
|
||||
; AVX512BW-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm0
|
||||
; AVX512BW-NEXT: vinserti64x4 $1, %ymm4, %zmm0, %zmm0
|
||||
|
|
@ -5995,49 +5995,49 @@ define <64 x i1> @test_cmp_v64i16(<64 x i16> %a0, <64 x i16> %a1) nounwind {
|
|||
; AVX512BW-NEXT: vpextrw $1, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm2, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm4, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm5
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm2, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm4, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm5, %xmm2
|
||||
; AVX512BW-NEXT: vextracti32x4 $2, %zmm3, %xmm4
|
||||
; AVX512BW-NEXT: vpextrw $1, %xmm4, %edx
|
||||
|
|
@ -6045,49 +6045,49 @@ define <64 x i1> @test_cmp_v64i16(<64 x i16> %a0, <64 x i16> %a1) nounwind {
|
|||
; AVX512BW-NEXT: vpextrw $1, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm4, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm5, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm6
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm6, %xmm4
|
||||
; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm4, %ymm2
|
||||
; AVX512BW-NEXT: vextracti128 $1, %ymm3, %xmm4
|
||||
|
|
@ -6096,96 +6096,96 @@ define <64 x i1> @test_cmp_v64i16(<64 x i16> %a0, <64 x i16> %a1) nounwind {
|
|||
; AVX512BW-NEXT: vpextrw $1, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm4, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm5, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm6
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm6, %xmm6
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm4, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm5, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $7, %edx, %xmm6, %xmm4
|
||||
; AVX512BW-NEXT: vpextrw $1, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $1, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vmovd %xmm3, %esi
|
||||
; AVX512BW-NEXT: vmovd %xmm1, %edi
|
||||
; AVX512BW-NEXT: cmpw %si, %di
|
||||
; AVX512BW-NEXT: movl $0, %esi
|
||||
; AVX512BW-NEXT: cmovgw %cx, %si
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %esi
|
||||
; AVX512BW-NEXT: vmovd %esi, %xmm5
|
||||
; AVX512BW-NEXT: vpinsrw $1, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $2, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $2, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $3, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $3, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $4, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $5, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $5, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $6, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: movl $0, %edx
|
||||
; AVX512BW-NEXT: cmovgw %cx, %dx
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %edx
|
||||
; AVX512BW-NEXT: vpinsrw $6, %edx, %xmm5, %xmm5
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm3, %edx
|
||||
; AVX512BW-NEXT: vpextrw $7, %xmm1, %esi
|
||||
; AVX512BW-NEXT: cmpw %dx, %si
|
||||
; AVX512BW-NEXT: cmovgw %cx, %ax
|
||||
; AVX512BW-NEXT: cmovgl %ecx, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $7, %eax, %xmm5, %xmm1
|
||||
; AVX512BW-NEXT: vinserti128 $1, %xmm4, %ymm1, %ymm1
|
||||
; AVX512BW-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1
|
||||
|
|
|
|||
Loading…
Reference in New Issue