forked from OSchip/llvm-project
Revert autogenerated check result for test/CodeGen/X86/atomic-minmax-i6432.ll as they don't regenerate cleanly.
llvm-svn: 294996
This commit is contained in:
Amaury Sechet
parent
d5abcd1b2e
commit
3422b539c8
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@ -1,207 +1,42 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=x86 -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
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; RUN: llc -march=x86 -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
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@sc64 = external global i64
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define void @atomic_maxmin_i6432() {
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; LINUX-LABEL: atomic_maxmin_i6432:
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; LINUX: # BB#0:
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; LINUX-NEXT: pushl %ebx
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; LINUX-NEXT: .Lcfi0:
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; LINUX-NEXT: .cfi_def_cfa_offset 8
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; LINUX-NEXT: pushl %esi
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; LINUX-NEXT: .Lcfi1:
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; LINUX-NEXT: .cfi_def_cfa_offset 12
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; LINUX-NEXT: .Lcfi2:
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; LINUX-NEXT: .cfi_offset %esi, -12
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; LINUX-NEXT: .Lcfi3:
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; LINUX-NEXT: .cfi_offset %ebx, -8
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; LINUX-NEXT: movl sc64+4, %edx
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; LINUX-NEXT: movl sc64, %eax
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; LINUX-NEXT: movl $4, %esi
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; LINUX-NEXT: .p2align 4, 0x90
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; LINUX-NEXT: .LBB0_1: # %atomicrmw.start
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; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
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; LINUX-NEXT: cmpl %eax, %esi
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; LINUX-NEXT: movl $0, %ecx
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; LINUX-NEXT: sbbl %edx, %ecx
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; LINUX-NEXT: setl %cl
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; LINUX-NEXT: andb $1, %cl
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; LINUX-NEXT: movl $5, %ebx
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; LINUX-NEXT: cmovnel %eax, %ebx
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; LINUX-NEXT: testb %cl, %cl
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; LINUX-NEXT: movl $0, %ecx
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; LINUX-NEXT: cmovnel %edx, %ecx
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; LINUX-NEXT: lock cmpxchg8b sc64
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; LINUX-NEXT: jne .LBB0_1
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; LINUX-NEXT: # BB#2: # %atomicrmw.end
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; LINUX-NEXT: movl sc64+4, %edx
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; LINUX-NEXT: movl sc64, %eax
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; LINUX-NEXT: .p2align 4, 0x90
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; LINUX-NEXT: .LBB0_3: # %atomicrmw.start2
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; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
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; LINUX-NEXT: cmpl $7, %eax
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; LINUX-NEXT: movl %edx, %ecx
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; LINUX-NEXT: sbbl $0, %ecx
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; LINUX-NEXT: setl %cl
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; LINUX-NEXT: andb $1, %cl
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; LINUX-NEXT: movl $6, %ebx
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; LINUX-NEXT: cmovnel %eax, %ebx
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; LINUX-NEXT: testb %cl, %cl
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; LINUX-NEXT: movl $0, %ecx
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; LINUX-NEXT: cmovnel %edx, %ecx
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; LINUX-NEXT: lock cmpxchg8b sc64
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; LINUX-NEXT: jne .LBB0_3
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; LINUX-NEXT: # BB#4: # %atomicrmw.end1
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; LINUX-NEXT: movl sc64+4, %edx
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; LINUX-NEXT: movl sc64, %eax
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; LINUX-NEXT: movl $7, %esi
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; LINUX-NEXT: .p2align 4, 0x90
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; LINUX-NEXT: .LBB0_5: # %atomicrmw.start8
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; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
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; LINUX-NEXT: cmpl %eax, %esi
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; LINUX-NEXT: movl $0, %ecx
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; LINUX-NEXT: sbbl %edx, %ecx
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; LINUX-NEXT: setb %cl
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; LINUX-NEXT: andb $1, %cl
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; LINUX-NEXT: movl $7, %ebx
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; LINUX-NEXT: cmovnel %eax, %ebx
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; LINUX-NEXT: testb %cl, %cl
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; LINUX-NEXT: movl $0, %ecx
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; LINUX-NEXT: cmovnel %edx, %ecx
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; LINUX-NEXT: lock cmpxchg8b sc64
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; LINUX-NEXT: jne .LBB0_5
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; LINUX-NEXT: # BB#6: # %atomicrmw.end7
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; LINUX-NEXT: movl sc64+4, %edx
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; LINUX-NEXT: movl sc64, %eax
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; LINUX-NEXT: .p2align 4, 0x90
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; LINUX-NEXT: .LBB0_7: # %atomicrmw.start14
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; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
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; LINUX-NEXT: cmpl $9, %eax
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; LINUX-NEXT: movl %edx, %ecx
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; LINUX-NEXT: sbbl $0, %ecx
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; LINUX-NEXT: setb %cl
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; LINUX-NEXT: andb $1, %cl
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; LINUX-NEXT: movl $8, %ebx
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; LINUX-NEXT: cmovnel %eax, %ebx
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; LINUX-NEXT: testb %cl, %cl
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; LINUX-NEXT: movl $0, %ecx
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; LINUX-NEXT: cmovnel %edx, %ecx
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; LINUX-NEXT: lock cmpxchg8b sc64
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; LINUX-NEXT: jne .LBB0_7
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; LINUX-NEXT: # BB#8: # %atomicrmw.end13
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; LINUX-NEXT: popl %esi
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; LINUX-NEXT: popl %ebx
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; LINUX-NEXT: retl
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;
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; PIC-LABEL: atomic_maxmin_i6432:
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; PIC: ## BB#0:
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; PIC-NEXT: pushl %ebx
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; PIC-NEXT: Lcfi0:
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; PIC-NEXT: .cfi_def_cfa_offset 8
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; PIC-NEXT: pushl %edi
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; PIC-NEXT: Lcfi1:
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; PIC-NEXT: .cfi_def_cfa_offset 12
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; PIC-NEXT: pushl %esi
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; PIC-NEXT: Lcfi2:
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; PIC-NEXT: .cfi_def_cfa_offset 16
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; PIC-NEXT: Lcfi3:
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; PIC-NEXT: .cfi_offset %esi, -16
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; PIC-NEXT: Lcfi4:
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; PIC-NEXT: .cfi_offset %edi, -12
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; PIC-NEXT: Lcfi5:
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; PIC-NEXT: .cfi_offset %ebx, -8
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; PIC-NEXT: calll L0$pb
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; PIC-NEXT: Lcfi6:
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; PIC-NEXT: .cfi_adjust_cfa_offset 4
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; PIC-NEXT: L0$pb:
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; PIC-NEXT: popl %eax
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; PIC-NEXT: Lcfi7:
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; PIC-NEXT: .cfi_adjust_cfa_offset -4
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; PIC-NEXT: movl L_sc64$non_lazy_ptr-L0$pb(%eax), %esi
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; PIC-NEXT: movl (%esi), %eax
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; PIC-NEXT: movl 4(%esi), %edx
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; PIC-NEXT: movl $4, %edi
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; PIC-NEXT: .p2align 4, 0x90
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; PIC-NEXT: LBB0_1: ## %atomicrmw.start
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; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
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; PIC-NEXT: cmpl %eax, %edi
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; PIC-NEXT: movl $0, %ecx
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; PIC-NEXT: sbbl %edx, %ecx
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; PIC-NEXT: setl %cl
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; PIC-NEXT: andb $1, %cl
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; PIC-NEXT: movl $5, %ebx
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; PIC-NEXT: cmovnel %eax, %ebx
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; PIC-NEXT: testb %cl, %cl
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; PIC-NEXT: movl $0, %ecx
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; PIC-NEXT: cmovnel %edx, %ecx
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; PIC-NEXT: lock cmpxchg8b (%esi)
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; PIC-NEXT: jne LBB0_1
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; PIC-NEXT: ## BB#2: ## %atomicrmw.end
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; PIC-NEXT: movl (%esi), %eax
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; PIC-NEXT: movl 4(%esi), %edx
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; PIC-NEXT: .p2align 4, 0x90
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; PIC-NEXT: LBB0_3: ## %atomicrmw.start2
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; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
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; PIC-NEXT: cmpl $7, %eax
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; PIC-NEXT: movl %edx, %ecx
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; PIC-NEXT: sbbl $0, %ecx
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; PIC-NEXT: setl %cl
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; PIC-NEXT: andb $1, %cl
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; PIC-NEXT: movl $6, %ebx
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; PIC-NEXT: cmovnel %eax, %ebx
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; PIC-NEXT: testb %cl, %cl
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; PIC-NEXT: movl $0, %ecx
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; PIC-NEXT: cmovnel %edx, %ecx
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; PIC-NEXT: lock cmpxchg8b (%esi)
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; PIC-NEXT: jne LBB0_3
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; PIC-NEXT: ## BB#4: ## %atomicrmw.end1
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; PIC-NEXT: movl (%esi), %eax
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; PIC-NEXT: movl 4(%esi), %edx
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; PIC-NEXT: movl $7, %edi
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; PIC-NEXT: .p2align 4, 0x90
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; PIC-NEXT: LBB0_5: ## %atomicrmw.start8
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; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
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; PIC-NEXT: cmpl %eax, %edi
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; PIC-NEXT: movl $0, %ecx
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; PIC-NEXT: sbbl %edx, %ecx
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; PIC-NEXT: setb %cl
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; PIC-NEXT: andb $1, %cl
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; PIC-NEXT: movl $7, %ebx
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; PIC-NEXT: cmovnel %eax, %ebx
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; PIC-NEXT: testb %cl, %cl
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; PIC-NEXT: movl $0, %ecx
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; PIC-NEXT: cmovnel %edx, %ecx
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; PIC-NEXT: lock cmpxchg8b (%esi)
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; PIC-NEXT: jne LBB0_5
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; PIC-NEXT: ## BB#6: ## %atomicrmw.end7
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; PIC-NEXT: movl (%esi), %eax
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; PIC-NEXT: movl 4(%esi), %edx
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; PIC-NEXT: .p2align 4, 0x90
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; PIC-NEXT: LBB0_7: ## %atomicrmw.start14
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; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
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; PIC-NEXT: cmpl $9, %eax
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; PIC-NEXT: movl %edx, %ecx
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; PIC-NEXT: sbbl $0, %ecx
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; PIC-NEXT: setb %cl
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; PIC-NEXT: andb $1, %cl
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; PIC-NEXT: movl $8, %ebx
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; PIC-NEXT: cmovnel %eax, %ebx
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; PIC-NEXT: testb %cl, %cl
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; PIC-NEXT: movl $0, %ecx
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; PIC-NEXT: cmovnel %edx, %ecx
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; PIC-NEXT: lock cmpxchg8b (%esi)
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; PIC-NEXT: jne LBB0_7
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; PIC-NEXT: ## BB#8: ## %atomicrmw.end13
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; PIC-NEXT: popl %esi
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; PIC-NEXT: popl %edi
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; PIC-NEXT: popl %ebx
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; PIC-NEXT: retl
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; LINUX: atomic_maxmin_i6432
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%1 = atomicrmw max i64* @sc64, i64 5 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%2 = atomicrmw min i64* @sc64, i64 6 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%3 = atomicrmw umax i64* @sc64, i64 7 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%4 = atomicrmw umin i64* @sc64, i64 8 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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ret void
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}
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@ -209,60 +44,9 @@ define void @atomic_maxmin_i6432() {
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@id = internal global i64 0, align 8
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define void @tf_bug(i8* %ptr) nounwind {
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; LINUX-LABEL: tf_bug:
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; LINUX: # BB#0:
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; LINUX-NEXT: pushl %ebx
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; LINUX-NEXT: pushl %esi
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; LINUX-NEXT: movl {{[0-9]+}}(%esp), %esi
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; LINUX-NEXT: movl id+4, %edx
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; LINUX-NEXT: movl id, %eax
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; LINUX-NEXT: .p2align 4, 0x90
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; LINUX-NEXT: .LBB1_1: # %atomicrmw.start
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; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
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; LINUX-NEXT: movl %eax, %ebx
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; LINUX-NEXT: addl $1, %ebx
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; LINUX-NEXT: movl %edx, %ecx
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; LINUX-NEXT: adcl $0, %ecx
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; LINUX-NEXT: lock cmpxchg8b id
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; LINUX-NEXT: jne .LBB1_1
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; LINUX-NEXT: # BB#2: # %atomicrmw.end
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; LINUX-NEXT: addl $1, %eax
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; LINUX-NEXT: adcl $0, %edx
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; LINUX-NEXT: movl %eax, (%esi)
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; LINUX-NEXT: movl %edx, 4(%esi)
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; LINUX-NEXT: popl %esi
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; LINUX-NEXT: popl %ebx
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; LINUX-NEXT: retl
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;
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; PIC-LABEL: tf_bug:
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; PIC: ## BB#0:
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; PIC-NEXT: pushl %ebx
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; PIC-NEXT: pushl %edi
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; PIC-NEXT: pushl %esi
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; PIC-NEXT: calll L1$pb
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; PIC-NEXT: L1$pb:
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; PIC-NEXT: popl %edi
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; PIC-NEXT: movl {{[0-9]+}}(%esp), %esi
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; PIC-NEXT: movl (_id-L1$pb)+4(%edi), %edx
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; PIC-NEXT: movl _id-L1$pb(%edi), %eax
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; PIC-NEXT: .p2align 4, 0x90
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; PIC-NEXT: LBB1_1: ## %atomicrmw.start
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; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
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; PIC-NEXT: movl %eax, %ebx
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; PIC-NEXT: addl $1, %ebx
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; PIC-NEXT: movl %edx, %ecx
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; PIC-NEXT: adcl $0, %ecx
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; PIC-NEXT: lock cmpxchg8b _id-L1$pb(%edi)
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; PIC-NEXT: jne LBB1_1
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; PIC-NEXT: ## BB#2: ## %atomicrmw.end
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; PIC-NEXT: addl $1, %eax
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; PIC-NEXT: adcl $0, %edx
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; PIC-NEXT: movl %eax, (%esi)
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; PIC-NEXT: movl %edx, 4(%esi)
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; PIC-NEXT: popl %esi
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; PIC-NEXT: popl %edi
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; PIC-NEXT: popl %ebx
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; PIC-NEXT: retl
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; PIC-DAG: movl _id-L1$pb(
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; PIC-DAG: movl (_id-L1$pb)+4(
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%tmp1 = atomicrmw add i64* @id, i64 1 seq_cst
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%tmp2 = add i64 %tmp1, 1
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%tmp3 = bitcast i8* %ptr to i64*
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