forked from OSchip/llvm-project
simplify patterns by merging in operand info
llvm-svn: 30790
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ca21ce5f08
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@ -224,17 +224,21 @@ class SD_Intrm<bits<8> o, string OpcodeStr, Intrinsic IntId>
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2}"),
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[(set VR128:$dst, (v2f64 (IntId VR128:$src1, (load addr:$src2))))]>;
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class PS_Intr<bits<8> o, string asm, Intrinsic IntId>
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: PSI<o, MRMSrcReg, (ops VR128:$dst, VR128:$src), asm,
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class PS_Intr<bits<8> o, string OpcodeStr, Intrinsic IntId>
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: PSI<o, MRMSrcReg, (ops VR128:$dst, VR128:$src),
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!strconcat(OpcodeStr, " {$src, $dst|$dst, $src}"),
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[(set VR128:$dst, (IntId VR128:$src))]>;
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class PS_Intm<bits<8> o, string asm, Intrinsic IntId>
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: PSI<o, MRMSrcMem, (ops VR128:$dst, f32mem:$src), asm,
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class PS_Intm<bits<8> o, string OpcodeStr, Intrinsic IntId>
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: PSI<o, MRMSrcMem, (ops VR128:$dst, f32mem:$src),
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!strconcat(OpcodeStr, " {$src, $dst|$dst, $src}"),
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[(set VR128:$dst, (IntId (loadv4f32 addr:$src)))]>;
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class PD_Intr<bits<8> o, string asm, Intrinsic IntId>
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: PDI<o, MRMSrcReg, (ops VR128:$dst, VR128:$src), asm,
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class PD_Intr<bits<8> o, string OpcodeStr, Intrinsic IntId>
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: PDI<o, MRMSrcReg, (ops VR128:$dst, VR128:$src),
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!strconcat(OpcodeStr, " {$src, $dst|$dst, $src}"),
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[(set VR128:$dst, (IntId VR128:$src))]>;
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class PD_Intm<bits<8> o, string asm, Intrinsic IntId>
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: PDI<o, MRMSrcMem, (ops VR128:$dst, f64mem:$src), asm,
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class PD_Intm<bits<8> o, string OpcodeStr, Intrinsic IntId>
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: PDI<o, MRMSrcMem, (ops VR128:$dst, f64mem:$src),
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!strconcat(OpcodeStr, " {$src, $dst|$dst, $src}"),
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[(set VR128:$dst, (IntId (loadv2f64 addr:$src)))]>;
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class PS_Intrr<bits<8> o, string OpcodeStr, Intrinsic IntId>
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@ -1029,35 +1033,27 @@ def ADDSUBPDrm : S3I<0xD0, MRMSrcMem,
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(loadv2f64 addr:$src2)))]>;
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}
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def SQRTPSr : PS_Intr<0x51, "sqrtps {$src, $dst|$dst, $src}",
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int_x86_sse_sqrt_ps>;
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def SQRTPSm : PS_Intm<0x51, "sqrtps {$src, $dst|$dst, $src}",
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int_x86_sse_sqrt_ps>;
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def SQRTPDr : PD_Intr<0x51, "sqrtpd {$src, $dst|$dst, $src}",
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int_x86_sse2_sqrt_pd>;
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def SQRTPDm : PD_Intm<0x51, "sqrtpd {$src, $dst|$dst, $src}",
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int_x86_sse2_sqrt_pd>;
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def SQRTPSr : PS_Intr<0x51, "sqrtps", int_x86_sse_sqrt_ps>;
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def SQRTPSm : PS_Intm<0x51, "sqrtps", int_x86_sse_sqrt_ps>;
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def SQRTPDr : PD_Intr<0x51, "sqrtpd", int_x86_sse2_sqrt_pd>;
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def SQRTPDm : PD_Intm<0x51, "sqrtpd", int_x86_sse2_sqrt_pd>;
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def RSQRTPSr : PS_Intr<0x52, "rsqrtps {$src, $dst|$dst, $src}",
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int_x86_sse_rsqrt_ps>;
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def RSQRTPSm : PS_Intm<0x52, "rsqrtps {$src, $dst|$dst, $src}",
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int_x86_sse_rsqrt_ps>;
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def RCPPSr : PS_Intr<0x53, "rcpps {$src, $dst|$dst, $src}",
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int_x86_sse_rcp_ps>;
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def RCPPSm : PS_Intm<0x53, "rcpps {$src, $dst|$dst, $src}",
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int_x86_sse_rcp_ps>;
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def RSQRTPSr : PS_Intr<0x52, "rsqrtps", int_x86_sse_rsqrt_ps>;
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def RSQRTPSm : PS_Intm<0x52, "rsqrtps", int_x86_sse_rsqrt_ps>;
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def RCPPSr : PS_Intr<0x53, "rcpps", int_x86_sse_rcp_ps>;
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def RCPPSm : PS_Intm<0x53, "rcpps", int_x86_sse_rcp_ps>;
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let isTwoAddress = 1 in {
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let isCommutable = 1 in {
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def MAXPSrr : PS_Intrr<0x5F, "maxps", int_x86_sse_max_ps>;
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def MAXPDrr : PD_Intrr<0x5F, "maxpd", int_x86_sse2_max_pd>;
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def MINPSrr : PS_Intrr<0x5D, "minps", int_x86_sse_min_ps>;
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def MINPDrr : PD_Intrr<0x5D, "minpd", int_x86_sse2_min_pd>;
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def MAXPSrr : PS_Intrr<0x5F, "maxps", int_x86_sse_max_ps>;
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def MAXPDrr : PD_Intrr<0x5F, "maxpd", int_x86_sse2_max_pd>;
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def MINPSrr : PS_Intrr<0x5D, "minps", int_x86_sse_min_ps>;
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def MINPDrr : PD_Intrr<0x5D, "minpd", int_x86_sse2_min_pd>;
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}
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def MAXPSrm : PS_Intrm<0x5F, "maxps", int_x86_sse_max_ps>;
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def MAXPDrm : PD_Intrm<0x5F, "maxpd", int_x86_sse2_max_pd>;
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def MINPSrm : PS_Intrm<0x5D, "minps", int_x86_sse_min_ps>;
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def MINPDrm : PD_Intrm<0x5D, "minpd", int_x86_sse2_min_pd>;
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def MAXPSrm : PS_Intrm<0x5F, "maxps", int_x86_sse_max_ps>;
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def MAXPDrm : PD_Intrm<0x5F, "maxpd", int_x86_sse2_max_pd>;
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def MINPSrm : PS_Intrm<0x5D, "minps", int_x86_sse_min_ps>;
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def MINPDrm : PD_Intrm<0x5D, "minpd", int_x86_sse2_min_pd>;
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}
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// Logical
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