From 34056dea1ba5daacd3b0a411691fea9e1258e1c1 Mon Sep 17 00:00:00 2001 From: Pirama Arumuga Nainar Date: Mon, 20 Apr 2015 20:15:36 +0000 Subject: [PATCH] [MIPS] OperationAction for FP_TO_FP16, FP16_TO_FP Summary: Set operation action for FP16 conversion opcodes, so the Op legalizer can choose the gnu_* libcalls for Mips. Set LoadExtAction and TruncStoreAction for f16 scalars and vectors to prevent (fpext (load )) and (store (fptrunc)) from getting combined into unsupported operations. Added test cases to test that these operations are handled correctly for f16 scalars and vectors. This patch depends on http://reviews.llvm.org/D8755. Reviewers: srhines Subscribers: llvm-commits, ab Differential Revision: http://reviews.llvm.org/D8804 llvm-svn: 235341 --- llvm/lib/Target/Mips/MipsISelLowering.cpp | 24 +++++- llvm/test/CodeGen/Mips/fp16-promote.ll | 96 +++++++++++++++++++++++ 2 files changed, 118 insertions(+), 2 deletions(-) create mode 100644 llvm/test/CodeGen/Mips/fp16-promote.ll diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index f37737dfc006..c78b79fcf1a7 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -221,9 +221,23 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM, setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); } - // MIPS doesn't have extending float->double load/store - for (MVT VT : MVT::fp_valuetypes()) + // MIPS doesn't have extending float->double load/store. Set LoadExtAction + // for f32, f16 + for (MVT VT : MVT::fp_valuetypes()) { setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); + setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand); + } + + // Set LoadExtAction for f16 vectors to Expand + for (MVT VT : MVT::fp_vector_valuetypes()) { + MVT F16VT = MVT::getVectorVT(MVT::f16, VT.getVectorNumElements()); + if (F16VT.isValid()) + setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand); + } + + setTruncStoreAction(MVT::f32, MVT::f16, Expand); + setTruncStoreAction(MVT::f64, MVT::f16, Expand); + setTruncStoreAction(MVT::f64, MVT::f32, Expand); // Used by legalize types to correctly generate the setcc result. @@ -339,6 +353,12 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM, setOperationAction(ISD::FREM, MVT::f32, Expand); setOperationAction(ISD::FREM, MVT::f64, Expand); + // Lower f16 conversion operations into library calls + setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); + setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand); + setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); + setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand); + setOperationAction(ISD::EH_RETURN, MVT::Other, Custom); setOperationAction(ISD::VASTART, MVT::Other, Custom); diff --git a/llvm/test/CodeGen/Mips/fp16-promote.ll b/llvm/test/CodeGen/Mips/fp16-promote.ll new file mode 100644 index 000000000000..410352fded5c --- /dev/null +++ b/llvm/test/CodeGen/Mips/fp16-promote.ll @@ -0,0 +1,96 @@ +; RUN: llc -asm-verbose=false -mtriple=mipsel-linux-gnueabi < %s | FileCheck %s -check-prefix=CHECK-LIBCALL + +; CHECK-LIBCALL-LABEL: test_fadd: +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL-DAG: add.s +; CHECK-LIBCALL-DAG: %call16(__gnu_f2h_ieee) +define void @test_fadd(half* %p, half* %q) #0 { + %a = load half, half* %p, align 2 + %b = load half, half* %q, align 2 + %r = fadd half %a, %b + store half %r, half* %p + ret void +} + +; CHECK-LIBCALL-LABEL: test_fpext_float: +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +define float @test_fpext_float(half* %p) { + %a = load half, half* %p, align 2 + %r = fpext half %a to float + ret float %r +} + +; CHECK-LIBCALL-LABEL: test_fpext_double: +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL: cvt.d.s +define double @test_fpext_double(half* %p) { + %a = load half, half* %p, align 2 + %r = fpext half %a to double + ret double %r +} + +; CHECK-LIBCALL-LABEL: test_fptrunc_float: +; CHECK-LIBCALL: %call16(__gnu_f2h_ieee) +define void @test_fptrunc_float(float %f, half* %p) #0 { + %a = fptrunc float %f to half + store half %a, half* %p + ret void +} + +; CHECK-LIBCALL-LABEL: test_fptrunc_double: +; CHECK-LIBCALL: %call16(__truncdfhf2) +define void @test_fptrunc_double(double %d, half* %p) #0 { + %a = fptrunc double %d to half + store half %a, half* %p + ret void +} + +; CHECK-LIBCALL-LABEL: test_vec_fpext_float: +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL: %call16(__gnu_h2f_ieee) +define <4 x float> @test_vec_fpext_float(<4 x half>* %p) #0 { + %a = load <4 x half>, <4 x half>* %p, align 8 + %b = fpext <4 x half> %a to <4 x float> + ret <4 x float> %b +} + +; CHECK-LIBCALL-LABEL: test_vec_fpext_double: +; CHECK-LIBCALL-DAG: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL-DAG: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL-DAG: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL-DAG: %call16(__gnu_h2f_ieee) +; CHECK-LIBCALL-DAG: cvt.d.s +; CHECK-LIBCALL-DAG: cvt.d.s +; CHECK-LIBCALL-DAG: cvt.d.s +; CHECK-LIBCALL: cvt.d.s +define <4 x double> @test_vec_fpext_double(<4 x half>* %p) #0 { + %a = load <4 x half>, <4 x half>* %p, align 8 + %b = fpext <4 x half> %a to <4 x double> + ret <4 x double> %b +} + +; CHECK-LIBCALL-LABEL: test_vec_fptrunc_float: +; CHECK-LIBCALL: %call16(__gnu_f2h_ieee) +; CHECK-LIBCALL: %call16(__gnu_f2h_ieee) +; CHECK-LIBCALL: %call16(__gnu_f2h_ieee) +; CHECK-LIBCALL: %call16(__gnu_f2h_ieee) +define void @test_vec_fptrunc_float(<4 x float> %a, <4 x half>* %p) #0 { + %b = fptrunc <4 x float> %a to <4 x half> + store <4 x half> %b, <4 x half>* %p, align 8 + ret void +} + +; CHECK-LIBCALL-LABEL: test_vec_fptrunc_double: +; CHECK-LIBCALL: %call16(__truncdfhf2) +; CHECK-LIBCALL: %call16(__truncdfhf2) +; CHECK-LIBCALL: %call16(__truncdfhf2) +; CHECK-LIBCALL: %call16(__truncdfhf2) +define void @test_vec_fptrunc_double(<4 x double> %a, <4 x half>* %p) #0 { + %b = fptrunc <4 x double> %a to <4 x half> + store <4 x half> %b, <4 x half>* %p, align 8 + ret void +} +