forked from OSchip/llvm-project
[x86] add test for unaligned 32-byte load/store splitting; NFC
llvm-svn: 363852
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@ -1,7 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
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define void @wideloads(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind uwtable noinline ssp {
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define void @wideloads(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind {
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; CHECK-LABEL: wideloads:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovaps (%rdi), %xmm0
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@ -26,7 +26,7 @@ define void @wideloads(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwi
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ret void
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}
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define void @widestores(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind uwtable noinline ssp {
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define void @widestores(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind {
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; CHECK-LABEL: widestores:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovaps (%rdi), %ymm0
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@ -44,3 +44,20 @@ define void @widestores(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounw
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ret void
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}
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define void @widestores_unaligned_load(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind {
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; CHECK-LABEL: widestores_unaligned_load:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovaps (%rdi), %ymm0
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; CHECK-NEXT: vmovaps (%rsi), %xmm1
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; CHECK-NEXT: vmovaps 16(%rsi), %xmm2
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; CHECK-NEXT: vmovaps %ymm0, (%rsi)
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; CHECK-NEXT: vmovaps %xmm2, 16(%rdi)
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; CHECK-NEXT: vmovaps %xmm1, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%v0 = load <8 x float>, <8 x float>* %a, align 32 ; <--- aligned
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%v1 = load <8 x float>, <8 x float>* %b, align 16 ; <--- unaligned
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store <8 x float> %v0, <8 x float>* %b, align 32 ; <--- aligned
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store <8 x float> %v1, <8 x float>* %a, align 16 ; <--- unaligned
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ret void
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}
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